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![Eric Biggers](/assets/img/avatar_default.png)
The CRYPTO_TFM_RES_* flags were apparently meant as a way to make the ->setkey() functions provide more information about errors. But these flags weren't actually being used or tested, and in many cases they weren't being set correctly anyway. So they've now been removed. Also, if someone ever actually needs to start better distinguishing ->setkey() errors (which is somewhat unlikely, as this has been unneeded for a long time), we'd be much better off just defining different return values, like -EINVAL if the key is invalid for the algorithm vs. -EKEYREJECTED if the key was rejected by a policy like "no weak keys". That would be much simpler, less error-prone, and easier to test. So just remove CRYPTO_TFM_RES_MASK and all the unneeded logic that propagates these flags around. Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
436 lines
10 KiB
C
436 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/* Copyright (C) 2004-2006, Advanced Micro Devices, Inc.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/crypto.h>
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#include <linux/spinlock.h>
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#include <crypto/algapi.h>
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#include <crypto/aes.h>
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#include <crypto/internal/skcipher.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include "geode-aes.h"
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/* Static structures */
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static void __iomem *_iobase;
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static spinlock_t lock;
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/* Write a 128 bit field (either a writable key or IV) */
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static inline void
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_writefield(u32 offset, const void *value)
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{
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int i;
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for (i = 0; i < 4; i++)
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iowrite32(((const u32 *) value)[i], _iobase + offset + (i * 4));
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}
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/* Read a 128 bit field (either a writable key or IV) */
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static inline void
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_readfield(u32 offset, void *value)
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{
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int i;
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for (i = 0; i < 4; i++)
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((u32 *) value)[i] = ioread32(_iobase + offset + (i * 4));
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}
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static int
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do_crypt(const void *src, void *dst, u32 len, u32 flags)
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{
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u32 status;
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u32 counter = AES_OP_TIMEOUT;
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iowrite32(virt_to_phys((void *)src), _iobase + AES_SOURCEA_REG);
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iowrite32(virt_to_phys(dst), _iobase + AES_DSTA_REG);
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iowrite32(len, _iobase + AES_LENA_REG);
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/* Start the operation */
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iowrite32(AES_CTRL_START | flags, _iobase + AES_CTRLA_REG);
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do {
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status = ioread32(_iobase + AES_INTR_REG);
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cpu_relax();
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} while (!(status & AES_INTRA_PENDING) && --counter);
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/* Clear the event */
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iowrite32((status & 0xFF) | AES_INTRA_PENDING, _iobase + AES_INTR_REG);
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return counter ? 0 : 1;
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}
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static void
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geode_aes_crypt(const struct geode_aes_tfm_ctx *tctx, const void *src,
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void *dst, u32 len, u8 *iv, int mode, int dir)
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{
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u32 flags = 0;
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unsigned long iflags;
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int ret;
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/* If the source and destination is the same, then
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* we need to turn on the coherent flags, otherwise
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* we don't need to worry
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*/
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flags |= (AES_CTRL_DCA | AES_CTRL_SCA);
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if (dir == AES_DIR_ENCRYPT)
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flags |= AES_CTRL_ENCRYPT;
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/* Start the critical section */
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spin_lock_irqsave(&lock, iflags);
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if (mode == AES_MODE_CBC) {
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flags |= AES_CTRL_CBC;
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_writefield(AES_WRITEIV0_REG, iv);
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}
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flags |= AES_CTRL_WRKEY;
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_writefield(AES_WRITEKEY0_REG, tctx->key);
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ret = do_crypt(src, dst, len, flags);
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BUG_ON(ret);
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if (mode == AES_MODE_CBC)
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_readfield(AES_WRITEIV0_REG, iv);
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spin_unlock_irqrestore(&lock, iflags);
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}
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/* CRYPTO-API Functions */
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static int geode_setkey_cip(struct crypto_tfm *tfm, const u8 *key,
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unsigned int len)
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{
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struct geode_aes_tfm_ctx *tctx = crypto_tfm_ctx(tfm);
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tctx->keylen = len;
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if (len == AES_KEYSIZE_128) {
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memcpy(tctx->key, key, len);
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return 0;
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}
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if (len != AES_KEYSIZE_192 && len != AES_KEYSIZE_256)
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/* not supported at all */
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return -EINVAL;
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/*
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* The requested key size is not supported by HW, do a fallback
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*/
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tctx->fallback.cip->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
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tctx->fallback.cip->base.crt_flags |=
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(tfm->crt_flags & CRYPTO_TFM_REQ_MASK);
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return crypto_cipher_setkey(tctx->fallback.cip, key, len);
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}
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static int geode_setkey_skcipher(struct crypto_skcipher *tfm, const u8 *key,
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unsigned int len)
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{
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struct geode_aes_tfm_ctx *tctx = crypto_skcipher_ctx(tfm);
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tctx->keylen = len;
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if (len == AES_KEYSIZE_128) {
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memcpy(tctx->key, key, len);
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return 0;
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}
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if (len != AES_KEYSIZE_192 && len != AES_KEYSIZE_256)
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/* not supported at all */
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return -EINVAL;
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/*
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* The requested key size is not supported by HW, do a fallback
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*/
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crypto_skcipher_clear_flags(tctx->fallback.skcipher,
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CRYPTO_TFM_REQ_MASK);
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crypto_skcipher_set_flags(tctx->fallback.skcipher,
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crypto_skcipher_get_flags(tfm) &
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CRYPTO_TFM_REQ_MASK);
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return crypto_skcipher_setkey(tctx->fallback.skcipher, key, len);
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}
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static void
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geode_encrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
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{
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const struct geode_aes_tfm_ctx *tctx = crypto_tfm_ctx(tfm);
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if (unlikely(tctx->keylen != AES_KEYSIZE_128)) {
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crypto_cipher_encrypt_one(tctx->fallback.cip, out, in);
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return;
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}
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geode_aes_crypt(tctx, in, out, AES_BLOCK_SIZE, NULL,
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AES_MODE_ECB, AES_DIR_ENCRYPT);
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}
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static void
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geode_decrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
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{
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const struct geode_aes_tfm_ctx *tctx = crypto_tfm_ctx(tfm);
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if (unlikely(tctx->keylen != AES_KEYSIZE_128)) {
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crypto_cipher_decrypt_one(tctx->fallback.cip, out, in);
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return;
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}
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geode_aes_crypt(tctx, in, out, AES_BLOCK_SIZE, NULL,
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AES_MODE_ECB, AES_DIR_DECRYPT);
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}
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static int fallback_init_cip(struct crypto_tfm *tfm)
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{
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const char *name = crypto_tfm_alg_name(tfm);
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struct geode_aes_tfm_ctx *tctx = crypto_tfm_ctx(tfm);
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tctx->fallback.cip = crypto_alloc_cipher(name, 0,
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CRYPTO_ALG_NEED_FALLBACK);
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if (IS_ERR(tctx->fallback.cip)) {
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printk(KERN_ERR "Error allocating fallback algo %s\n", name);
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return PTR_ERR(tctx->fallback.cip);
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}
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return 0;
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}
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static void fallback_exit_cip(struct crypto_tfm *tfm)
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{
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struct geode_aes_tfm_ctx *tctx = crypto_tfm_ctx(tfm);
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crypto_free_cipher(tctx->fallback.cip);
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}
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static struct crypto_alg geode_alg = {
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.cra_name = "aes",
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.cra_driver_name = "geode-aes",
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.cra_priority = 300,
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.cra_alignmask = 15,
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.cra_flags = CRYPTO_ALG_TYPE_CIPHER |
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CRYPTO_ALG_NEED_FALLBACK,
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.cra_init = fallback_init_cip,
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.cra_exit = fallback_exit_cip,
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct geode_aes_tfm_ctx),
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.cra_module = THIS_MODULE,
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.cra_u = {
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.cipher = {
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.cia_min_keysize = AES_MIN_KEY_SIZE,
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.cia_max_keysize = AES_MAX_KEY_SIZE,
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.cia_setkey = geode_setkey_cip,
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.cia_encrypt = geode_encrypt,
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.cia_decrypt = geode_decrypt
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}
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}
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};
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static int geode_init_skcipher(struct crypto_skcipher *tfm)
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{
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const char *name = crypto_tfm_alg_name(&tfm->base);
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struct geode_aes_tfm_ctx *tctx = crypto_skcipher_ctx(tfm);
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tctx->fallback.skcipher =
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crypto_alloc_skcipher(name, 0, CRYPTO_ALG_NEED_FALLBACK |
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CRYPTO_ALG_ASYNC);
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if (IS_ERR(tctx->fallback.skcipher)) {
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printk(KERN_ERR "Error allocating fallback algo %s\n", name);
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return PTR_ERR(tctx->fallback.skcipher);
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}
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crypto_skcipher_set_reqsize(tfm, sizeof(struct skcipher_request) +
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crypto_skcipher_reqsize(tctx->fallback.skcipher));
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return 0;
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}
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static void geode_exit_skcipher(struct crypto_skcipher *tfm)
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{
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struct geode_aes_tfm_ctx *tctx = crypto_skcipher_ctx(tfm);
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crypto_free_skcipher(tctx->fallback.skcipher);
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}
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static int geode_skcipher_crypt(struct skcipher_request *req, int mode, int dir)
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{
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struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
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const struct geode_aes_tfm_ctx *tctx = crypto_skcipher_ctx(tfm);
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struct skcipher_walk walk;
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unsigned int nbytes;
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int err;
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if (unlikely(tctx->keylen != AES_KEYSIZE_128)) {
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struct skcipher_request *subreq = skcipher_request_ctx(req);
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*subreq = *req;
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skcipher_request_set_tfm(subreq, tctx->fallback.skcipher);
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if (dir == AES_DIR_DECRYPT)
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return crypto_skcipher_decrypt(subreq);
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else
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return crypto_skcipher_encrypt(subreq);
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}
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err = skcipher_walk_virt(&walk, req, false);
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while ((nbytes = walk.nbytes) != 0) {
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geode_aes_crypt(tctx, walk.src.virt.addr, walk.dst.virt.addr,
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round_down(nbytes, AES_BLOCK_SIZE),
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walk.iv, mode, dir);
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err = skcipher_walk_done(&walk, nbytes % AES_BLOCK_SIZE);
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}
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return err;
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}
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static int geode_cbc_encrypt(struct skcipher_request *req)
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{
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return geode_skcipher_crypt(req, AES_MODE_CBC, AES_DIR_ENCRYPT);
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}
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static int geode_cbc_decrypt(struct skcipher_request *req)
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{
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return geode_skcipher_crypt(req, AES_MODE_CBC, AES_DIR_DECRYPT);
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}
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static int geode_ecb_encrypt(struct skcipher_request *req)
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{
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return geode_skcipher_crypt(req, AES_MODE_ECB, AES_DIR_ENCRYPT);
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}
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static int geode_ecb_decrypt(struct skcipher_request *req)
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{
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return geode_skcipher_crypt(req, AES_MODE_ECB, AES_DIR_DECRYPT);
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}
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static struct skcipher_alg geode_skcipher_algs[] = {
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{
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.base.cra_name = "cbc(aes)",
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.base.cra_driver_name = "cbc-aes-geode",
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.base.cra_priority = 400,
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.base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY |
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CRYPTO_ALG_NEED_FALLBACK,
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.base.cra_blocksize = AES_BLOCK_SIZE,
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.base.cra_ctxsize = sizeof(struct geode_aes_tfm_ctx),
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.base.cra_alignmask = 15,
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.base.cra_module = THIS_MODULE,
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.init = geode_init_skcipher,
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.exit = geode_exit_skcipher,
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.setkey = geode_setkey_skcipher,
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.encrypt = geode_cbc_encrypt,
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.decrypt = geode_cbc_decrypt,
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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.ivsize = AES_BLOCK_SIZE,
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}, {
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.base.cra_name = "ecb(aes)",
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.base.cra_driver_name = "ecb-aes-geode",
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.base.cra_priority = 400,
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.base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY |
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CRYPTO_ALG_NEED_FALLBACK,
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.base.cra_blocksize = AES_BLOCK_SIZE,
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.base.cra_ctxsize = sizeof(struct geode_aes_tfm_ctx),
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.base.cra_alignmask = 15,
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.base.cra_module = THIS_MODULE,
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.init = geode_init_skcipher,
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.exit = geode_exit_skcipher,
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.setkey = geode_setkey_skcipher,
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.encrypt = geode_ecb_encrypt,
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.decrypt = geode_ecb_decrypt,
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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},
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};
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static void geode_aes_remove(struct pci_dev *dev)
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{
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crypto_unregister_alg(&geode_alg);
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crypto_unregister_skciphers(geode_skcipher_algs,
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ARRAY_SIZE(geode_skcipher_algs));
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pci_iounmap(dev, _iobase);
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_iobase = NULL;
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pci_release_regions(dev);
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pci_disable_device(dev);
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}
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static int geode_aes_probe(struct pci_dev *dev, const struct pci_device_id *id)
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{
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int ret;
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ret = pci_enable_device(dev);
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if (ret)
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return ret;
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ret = pci_request_regions(dev, "geode-aes");
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if (ret)
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goto eenable;
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_iobase = pci_iomap(dev, 0, 0);
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if (_iobase == NULL) {
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ret = -ENOMEM;
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goto erequest;
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}
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spin_lock_init(&lock);
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/* Clear any pending activity */
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iowrite32(AES_INTR_PENDING | AES_INTR_MASK, _iobase + AES_INTR_REG);
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ret = crypto_register_alg(&geode_alg);
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if (ret)
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goto eiomap;
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ret = crypto_register_skciphers(geode_skcipher_algs,
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ARRAY_SIZE(geode_skcipher_algs));
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if (ret)
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goto ealg;
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dev_notice(&dev->dev, "GEODE AES engine enabled.\n");
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return 0;
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ealg:
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crypto_unregister_alg(&geode_alg);
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eiomap:
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pci_iounmap(dev, _iobase);
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erequest:
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pci_release_regions(dev);
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eenable:
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pci_disable_device(dev);
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dev_err(&dev->dev, "GEODE AES initialization failed.\n");
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return ret;
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}
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static struct pci_device_id geode_aes_tbl[] = {
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_LX_AES), },
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{ 0, }
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};
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MODULE_DEVICE_TABLE(pci, geode_aes_tbl);
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static struct pci_driver geode_aes_driver = {
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.name = "Geode LX AES",
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.id_table = geode_aes_tbl,
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.probe = geode_aes_probe,
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.remove = geode_aes_remove,
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};
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module_pci_driver(geode_aes_driver);
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MODULE_AUTHOR("Advanced Micro Devices, Inc.");
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MODULE_DESCRIPTION("Geode LX Hardware AES driver");
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MODULE_LICENSE("GPL");
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