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![Charles Keepax](/assets/img/avatar_default.png)
The current unbinding process for Madera has some issues. The trouble is runtime PM is disabled as the first step of the process, but some of the drivers release IRQs causing regmap IRQ to issue a runtime get which fails. To allow runtime PM to remain enabled during mfd_remove_devices, the DCVDD regulator must remain available. In the case of external DCVDD's this is simple, the regulator can simply be disabled/put after the call to mfd_remove_devices. However, in the case of an internally supplied DCVDD the regulator needs to be released after the other MFD children depending on it. Use the new MFD mfd_remove_devices_late functionality to split the DCVDD regulator off from the other drivers. Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
775 lines
18 KiB
C
775 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Core MFD support for Cirrus Logic Madera codecs
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*
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* Copyright (C) 2015-2018 Cirrus Logic
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*/
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/gpio.h>
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#include <linux/mfd/core.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/notifier.h>
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#include <linux/of.h>
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#include <linux/of_gpio.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/regulator/machine.h>
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#include <linux/regulator/of_regulator.h>
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#include <linux/mfd/madera/core.h>
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#include <linux/mfd/madera/registers.h>
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#include "madera.h"
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#define CS47L15_SILICON_ID 0x6370
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#define CS47L35_SILICON_ID 0x6360
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#define CS47L85_SILICON_ID 0x6338
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#define CS47L90_SILICON_ID 0x6364
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#define CS47L92_SILICON_ID 0x6371
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#define MADERA_32KZ_MCLK2 1
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#define MADERA_RESET_MIN_US 2000
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#define MADERA_RESET_MAX_US 3000
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static const char * const madera_core_supplies[] = {
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"AVDD",
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"DBVDD1",
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};
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static const struct mfd_cell madera_ldo1_devs[] = {
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{
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.name = "madera-ldo1",
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.level = MFD_DEP_LEVEL_HIGH,
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},
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};
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static const char * const cs47l15_supplies[] = {
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"MICVDD",
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"CPVDD1",
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"SPKVDD",
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};
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static const struct mfd_cell cs47l15_devs[] = {
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{ .name = "madera-pinctrl", },
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{ .name = "madera-irq", },
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{ .name = "madera-gpio", },
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{
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.name = "madera-extcon",
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.parent_supplies = cs47l15_supplies,
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.num_parent_supplies = 1, /* We only need MICVDD */
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},
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{
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.name = "cs47l15-codec",
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.parent_supplies = cs47l15_supplies,
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.num_parent_supplies = ARRAY_SIZE(cs47l15_supplies),
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},
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};
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static const char * const cs47l35_supplies[] = {
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"MICVDD",
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"DBVDD2",
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"CPVDD1",
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"CPVDD2",
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"SPKVDD",
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};
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static const struct mfd_cell cs47l35_devs[] = {
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{ .name = "madera-pinctrl", },
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{ .name = "madera-irq", },
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{ .name = "madera-micsupp", },
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{ .name = "madera-gpio", },
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{
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.name = "madera-extcon",
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.parent_supplies = cs47l35_supplies,
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.num_parent_supplies = 1, /* We only need MICVDD */
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},
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{
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.name = "cs47l35-codec",
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.parent_supplies = cs47l35_supplies,
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.num_parent_supplies = ARRAY_SIZE(cs47l35_supplies),
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},
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};
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static const char * const cs47l85_supplies[] = {
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"MICVDD",
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"DBVDD2",
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"DBVDD3",
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"DBVDD4",
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"CPVDD1",
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"CPVDD2",
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"SPKVDDL",
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"SPKVDDR",
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};
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static const struct mfd_cell cs47l85_devs[] = {
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{ .name = "madera-pinctrl", },
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{ .name = "madera-irq", },
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{ .name = "madera-micsupp", },
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{ .name = "madera-gpio", },
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{
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.name = "madera-extcon",
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.parent_supplies = cs47l85_supplies,
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.num_parent_supplies = 1, /* We only need MICVDD */
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},
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{
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.name = "cs47l85-codec",
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.parent_supplies = cs47l85_supplies,
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.num_parent_supplies = ARRAY_SIZE(cs47l85_supplies),
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},
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};
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static const char * const cs47l90_supplies[] = {
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"MICVDD",
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"DBVDD2",
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"DBVDD3",
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"DBVDD4",
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"CPVDD1",
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"CPVDD2",
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};
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static const struct mfd_cell cs47l90_devs[] = {
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{ .name = "madera-pinctrl", },
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{ .name = "madera-irq", },
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{ .name = "madera-micsupp", },
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{ .name = "madera-gpio", },
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{
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.name = "madera-extcon",
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.parent_supplies = cs47l90_supplies,
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.num_parent_supplies = 1, /* We only need MICVDD */
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},
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{
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.name = "cs47l90-codec",
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.parent_supplies = cs47l90_supplies,
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.num_parent_supplies = ARRAY_SIZE(cs47l90_supplies),
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},
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};
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static const char * const cs47l92_supplies[] = {
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"MICVDD",
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"CPVDD1",
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"CPVDD2",
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};
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static const struct mfd_cell cs47l92_devs[] = {
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{ .name = "madera-pinctrl", },
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{ .name = "madera-irq", },
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{ .name = "madera-micsupp", },
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{ .name = "madera-gpio", },
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{
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.name = "madera-extcon",
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.parent_supplies = cs47l92_supplies,
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.num_parent_supplies = 1, /* We only need MICVDD */
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},
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{
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.name = "cs47l92-codec",
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.parent_supplies = cs47l92_supplies,
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.num_parent_supplies = ARRAY_SIZE(cs47l92_supplies),
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},
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};
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/* Used by madera-i2c and madera-spi drivers */
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const char *madera_name_from_type(enum madera_type type)
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{
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switch (type) {
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case CS47L15:
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return "CS47L15";
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case CS47L35:
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return "CS47L35";
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case CS47L85:
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return "CS47L85";
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case CS47L90:
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return "CS47L90";
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case CS47L91:
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return "CS47L91";
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case CS42L92:
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return "CS42L92";
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case CS47L92:
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return "CS47L92";
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case CS47L93:
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return "CS47L93";
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case WM1840:
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return "WM1840";
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default:
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return "Unknown";
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}
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}
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EXPORT_SYMBOL_GPL(madera_name_from_type);
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#define MADERA_BOOT_POLL_INTERVAL_USEC 5000
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#define MADERA_BOOT_POLL_TIMEOUT_USEC 25000
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static int madera_wait_for_boot_noack(struct madera *madera)
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{
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ktime_t timeout;
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unsigned int val = 0;
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int ret = 0;
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/*
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* We can't use an interrupt as we need to runtime resume to do so,
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* so we poll the status bit. This won't race with the interrupt
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* handler because it will be blocked on runtime resume.
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* The chip could NAK a read request while it is booting so ignore
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* errors from regmap_read.
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*/
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timeout = ktime_add_us(ktime_get(), MADERA_BOOT_POLL_TIMEOUT_USEC);
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regmap_read(madera->regmap, MADERA_IRQ1_RAW_STATUS_1, &val);
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while (!(val & MADERA_BOOT_DONE_STS1) &&
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!ktime_after(ktime_get(), timeout)) {
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usleep_range(MADERA_BOOT_POLL_INTERVAL_USEC / 2,
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MADERA_BOOT_POLL_INTERVAL_USEC);
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regmap_read(madera->regmap, MADERA_IRQ1_RAW_STATUS_1, &val);
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}
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if (!(val & MADERA_BOOT_DONE_STS1)) {
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dev_err(madera->dev, "Polling BOOT_DONE_STS timed out\n");
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ret = -ETIMEDOUT;
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}
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return ret;
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}
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static int madera_wait_for_boot(struct madera *madera)
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{
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int ret = madera_wait_for_boot_noack(madera);
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/*
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* BOOT_DONE defaults to unmasked on boot so we must ack it.
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* Do this even after a timeout to avoid interrupt storms.
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*/
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regmap_write(madera->regmap, MADERA_IRQ1_STATUS_1,
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MADERA_BOOT_DONE_EINT1);
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pm_runtime_mark_last_busy(madera->dev);
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return ret;
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}
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static int madera_soft_reset(struct madera *madera)
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{
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int ret;
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ret = regmap_write(madera->regmap, MADERA_SOFTWARE_RESET, 0);
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if (ret != 0) {
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dev_err(madera->dev, "Failed to soft reset device: %d\n", ret);
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return ret;
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}
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/* Allow time for internal clocks to startup after reset */
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usleep_range(MADERA_RESET_MIN_US, MADERA_RESET_MAX_US);
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return 0;
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}
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static void madera_enable_hard_reset(struct madera *madera)
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{
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/*
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* There are many existing out-of-tree users of these codecs that we
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* can't break so preserve the expected behaviour of setting the line
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* low to assert reset.
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*/
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gpiod_set_raw_value_cansleep(madera->pdata.reset, 0);
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}
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static void madera_disable_hard_reset(struct madera *madera)
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{
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gpiod_set_raw_value_cansleep(madera->pdata.reset, 1);
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usleep_range(MADERA_RESET_MIN_US, MADERA_RESET_MAX_US);
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}
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static int __maybe_unused madera_runtime_resume(struct device *dev)
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{
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struct madera *madera = dev_get_drvdata(dev);
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int ret;
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dev_dbg(dev, "Leaving sleep mode\n");
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ret = regulator_enable(madera->dcvdd);
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if (ret) {
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dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
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return ret;
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}
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regcache_cache_only(madera->regmap, false);
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regcache_cache_only(madera->regmap_32bit, false);
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usleep_range(MADERA_RESET_MIN_US, MADERA_RESET_MAX_US);
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ret = madera_wait_for_boot(madera);
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if (ret)
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goto err;
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ret = regcache_sync(madera->regmap);
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if (ret) {
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dev_err(dev, "Failed to restore 16-bit register cache\n");
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goto err;
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}
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ret = regcache_sync(madera->regmap_32bit);
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if (ret) {
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dev_err(dev, "Failed to restore 32-bit register cache\n");
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goto err;
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}
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return 0;
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err:
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regcache_cache_only(madera->regmap_32bit, true);
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regcache_cache_only(madera->regmap, true);
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regulator_disable(madera->dcvdd);
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return ret;
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}
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static int __maybe_unused madera_runtime_suspend(struct device *dev)
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{
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struct madera *madera = dev_get_drvdata(dev);
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dev_dbg(madera->dev, "Entering sleep mode\n");
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regcache_cache_only(madera->regmap, true);
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regcache_mark_dirty(madera->regmap);
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regcache_cache_only(madera->regmap_32bit, true);
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regcache_mark_dirty(madera->regmap_32bit);
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regulator_disable(madera->dcvdd);
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return 0;
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}
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const struct dev_pm_ops madera_pm_ops = {
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SET_RUNTIME_PM_OPS(madera_runtime_suspend,
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madera_runtime_resume,
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NULL)
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};
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EXPORT_SYMBOL_GPL(madera_pm_ops);
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const struct of_device_id madera_of_match[] = {
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{ .compatible = "cirrus,cs47l15", .data = (void *)CS47L15 },
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{ .compatible = "cirrus,cs47l35", .data = (void *)CS47L35 },
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{ .compatible = "cirrus,cs47l85", .data = (void *)CS47L85 },
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{ .compatible = "cirrus,cs47l90", .data = (void *)CS47L90 },
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{ .compatible = "cirrus,cs47l91", .data = (void *)CS47L91 },
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{ .compatible = "cirrus,cs42l92", .data = (void *)CS42L92 },
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{ .compatible = "cirrus,cs47l92", .data = (void *)CS47L92 },
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{ .compatible = "cirrus,cs47l93", .data = (void *)CS47L93 },
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{ .compatible = "cirrus,wm1840", .data = (void *)WM1840 },
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{}
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};
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MODULE_DEVICE_TABLE(of, madera_of_match);
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EXPORT_SYMBOL_GPL(madera_of_match);
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static int madera_get_reset_gpio(struct madera *madera)
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{
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struct gpio_desc *reset;
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int ret;
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if (madera->pdata.reset)
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return 0;
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reset = devm_gpiod_get_optional(madera->dev, "reset", GPIOD_OUT_LOW);
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if (IS_ERR(reset)) {
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ret = PTR_ERR(reset);
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if (ret != -EPROBE_DEFER)
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dev_err(madera->dev, "Failed to request /RESET: %d\n",
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ret);
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return ret;
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}
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/*
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* A hard reset is needed for full reset of the chip. We allow running
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* without hard reset only because it can be useful for early
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* prototyping and some debugging, but we need to warn it's not ideal.
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*/
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if (!reset)
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dev_warn(madera->dev,
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"Running without reset GPIO is not recommended\n");
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madera->pdata.reset = reset;
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return 0;
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}
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static void madera_set_micbias_info(struct madera *madera)
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{
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/*
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* num_childbias is an array because future codecs can have different
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* childbiases for each micbias. Unspecified values default to 0.
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*/
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switch (madera->type) {
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case CS47L15:
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madera->num_micbias = 1;
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madera->num_childbias[0] = 3;
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return;
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case CS47L35:
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madera->num_micbias = 2;
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madera->num_childbias[0] = 2;
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madera->num_childbias[1] = 2;
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return;
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case CS47L85:
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case WM1840:
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madera->num_micbias = 4;
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/* no child biases */
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return;
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case CS47L90:
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case CS47L91:
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madera->num_micbias = 2;
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madera->num_childbias[0] = 4;
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madera->num_childbias[1] = 4;
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return;
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case CS42L92:
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case CS47L92:
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case CS47L93:
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madera->num_micbias = 2;
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madera->num_childbias[0] = 4;
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madera->num_childbias[1] = 2;
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return;
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default:
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return;
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}
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}
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int madera_dev_init(struct madera *madera)
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{
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struct device *dev = madera->dev;
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unsigned int hwid;
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int (*patch_fn)(struct madera *) = NULL;
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const struct mfd_cell *mfd_devs;
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int n_devs = 0;
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int i, ret;
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dev_set_drvdata(madera->dev, madera);
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BLOCKING_INIT_NOTIFIER_HEAD(&madera->notifier);
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mutex_init(&madera->dapm_ptr_lock);
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madera_set_micbias_info(madera);
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/*
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* We need writable hw config info that all children can share.
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* Simplest to take one shared copy of pdata struct.
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*/
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if (dev_get_platdata(madera->dev)) {
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memcpy(&madera->pdata, dev_get_platdata(madera->dev),
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sizeof(madera->pdata));
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}
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madera->mclk[MADERA_MCLK1].id = "mclk1";
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madera->mclk[MADERA_MCLK2].id = "mclk2";
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madera->mclk[MADERA_MCLK3].id = "mclk3";
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ret = devm_clk_bulk_get_optional(madera->dev, ARRAY_SIZE(madera->mclk),
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madera->mclk);
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if (ret) {
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dev_err(madera->dev, "Failed to get clocks: %d\n", ret);
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return ret;
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}
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/* Not using devm_clk_get to prevent breakage of existing DTs */
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if (!madera->mclk[MADERA_MCLK2].clk)
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dev_warn(madera->dev, "Missing MCLK2, requires 32kHz clock\n");
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ret = madera_get_reset_gpio(madera);
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if (ret)
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return ret;
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regcache_cache_only(madera->regmap, true);
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regcache_cache_only(madera->regmap_32bit, true);
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for (i = 0; i < ARRAY_SIZE(madera_core_supplies); i++)
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madera->core_supplies[i].supply = madera_core_supplies[i];
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|
|
madera->num_core_supplies = ARRAY_SIZE(madera_core_supplies);
|
|
|
|
/*
|
|
* On some codecs DCVDD could be supplied by the internal LDO1.
|
|
* For those we must add the LDO1 driver before requesting DCVDD
|
|
* No devm_ because we need to control shutdown order of children.
|
|
*/
|
|
switch (madera->type) {
|
|
case CS47L15:
|
|
case CS47L35:
|
|
case CS47L90:
|
|
case CS47L91:
|
|
case CS42L92:
|
|
case CS47L92:
|
|
case CS47L93:
|
|
break;
|
|
case CS47L85:
|
|
case WM1840:
|
|
ret = mfd_add_devices(madera->dev, PLATFORM_DEVID_NONE,
|
|
madera_ldo1_devs,
|
|
ARRAY_SIZE(madera_ldo1_devs),
|
|
NULL, 0, NULL);
|
|
if (ret) {
|
|
dev_err(dev, "Failed to add LDO1 child: %d\n", ret);
|
|
return ret;
|
|
}
|
|
break;
|
|
default:
|
|
/* No point continuing if the type is unknown */
|
|
dev_err(madera->dev, "Unknown device type %d\n", madera->type);
|
|
return -ENODEV;
|
|
}
|
|
|
|
ret = devm_regulator_bulk_get(dev, madera->num_core_supplies,
|
|
madera->core_supplies);
|
|
if (ret) {
|
|
dev_err(dev, "Failed to request core supplies: %d\n", ret);
|
|
goto err_devs;
|
|
}
|
|
|
|
/*
|
|
* Don't use devres here. If the regulator is one of our children it
|
|
* will already have been removed before devres cleanup on this mfd
|
|
* driver tries to call put() on it. We need control of shutdown order.
|
|
*/
|
|
madera->dcvdd = regulator_get(madera->dev, "DCVDD");
|
|
if (IS_ERR(madera->dcvdd)) {
|
|
ret = PTR_ERR(madera->dcvdd);
|
|
dev_err(dev, "Failed to request DCVDD: %d\n", ret);
|
|
goto err_devs;
|
|
}
|
|
|
|
ret = regulator_bulk_enable(madera->num_core_supplies,
|
|
madera->core_supplies);
|
|
if (ret) {
|
|
dev_err(dev, "Failed to enable core supplies: %d\n", ret);
|
|
goto err_dcvdd;
|
|
}
|
|
|
|
ret = regulator_enable(madera->dcvdd);
|
|
if (ret) {
|
|
dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
|
|
goto err_enable;
|
|
}
|
|
|
|
madera_disable_hard_reset(madera);
|
|
|
|
regcache_cache_only(madera->regmap, false);
|
|
regcache_cache_only(madera->regmap_32bit, false);
|
|
|
|
ret = madera_wait_for_boot_noack(madera);
|
|
if (ret) {
|
|
dev_err(madera->dev, "Device failed initial boot: %d\n", ret);
|
|
goto err_reset;
|
|
}
|
|
|
|
/*
|
|
* Now we can power up and verify that this is a chip we know about
|
|
* before we start doing any writes to its registers.
|
|
*/
|
|
ret = regmap_read(madera->regmap, MADERA_SOFTWARE_RESET, &hwid);
|
|
if (ret) {
|
|
dev_err(dev, "Failed to read ID register: %d\n", ret);
|
|
goto err_reset;
|
|
}
|
|
|
|
switch (hwid) {
|
|
case CS47L15_SILICON_ID:
|
|
if (IS_ENABLED(CONFIG_MFD_CS47L15)) {
|
|
switch (madera->type) {
|
|
case CS47L15:
|
|
patch_fn = &cs47l15_patch;
|
|
mfd_devs = cs47l15_devs;
|
|
n_devs = ARRAY_SIZE(cs47l15_devs);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
break;
|
|
case CS47L35_SILICON_ID:
|
|
if (IS_ENABLED(CONFIG_MFD_CS47L35)) {
|
|
switch (madera->type) {
|
|
case CS47L35:
|
|
patch_fn = cs47l35_patch;
|
|
mfd_devs = cs47l35_devs;
|
|
n_devs = ARRAY_SIZE(cs47l35_devs);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
break;
|
|
case CS47L85_SILICON_ID:
|
|
if (IS_ENABLED(CONFIG_MFD_CS47L85)) {
|
|
switch (madera->type) {
|
|
case CS47L85:
|
|
case WM1840:
|
|
patch_fn = cs47l85_patch;
|
|
mfd_devs = cs47l85_devs;
|
|
n_devs = ARRAY_SIZE(cs47l85_devs);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
break;
|
|
case CS47L90_SILICON_ID:
|
|
if (IS_ENABLED(CONFIG_MFD_CS47L90)) {
|
|
switch (madera->type) {
|
|
case CS47L90:
|
|
case CS47L91:
|
|
patch_fn = cs47l90_patch;
|
|
mfd_devs = cs47l90_devs;
|
|
n_devs = ARRAY_SIZE(cs47l90_devs);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
break;
|
|
case CS47L92_SILICON_ID:
|
|
if (IS_ENABLED(CONFIG_MFD_CS47L92)) {
|
|
switch (madera->type) {
|
|
case CS42L92:
|
|
case CS47L92:
|
|
case CS47L93:
|
|
patch_fn = cs47l92_patch;
|
|
mfd_devs = cs47l92_devs;
|
|
n_devs = ARRAY_SIZE(cs47l92_devs);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
break;
|
|
default:
|
|
dev_err(madera->dev, "Unknown device ID: %x\n", hwid);
|
|
ret = -EINVAL;
|
|
goto err_reset;
|
|
}
|
|
|
|
if (!n_devs) {
|
|
dev_err(madera->dev, "Device ID 0x%x not a %s\n", hwid,
|
|
madera->type_name);
|
|
ret = -ENODEV;
|
|
goto err_reset;
|
|
}
|
|
|
|
/*
|
|
* It looks like a device we support. If we don't have a hard reset
|
|
* we can now attempt a soft reset.
|
|
*/
|
|
if (!madera->pdata.reset) {
|
|
ret = madera_soft_reset(madera);
|
|
if (ret)
|
|
goto err_reset;
|
|
}
|
|
|
|
ret = madera_wait_for_boot(madera);
|
|
if (ret) {
|
|
dev_err(madera->dev, "Failed to clear boot done: %d\n", ret);
|
|
goto err_reset;
|
|
}
|
|
|
|
ret = regmap_read(madera->regmap, MADERA_HARDWARE_REVISION,
|
|
&madera->rev);
|
|
if (ret) {
|
|
dev_err(dev, "Failed to read revision register: %d\n", ret);
|
|
goto err_reset;
|
|
}
|
|
madera->rev &= MADERA_HW_REVISION_MASK;
|
|
|
|
dev_info(dev, "%s silicon revision %d\n", madera->type_name,
|
|
madera->rev);
|
|
|
|
/* Apply hardware patch */
|
|
if (patch_fn) {
|
|
ret = patch_fn(madera);
|
|
if (ret) {
|
|
dev_err(madera->dev, "Failed to apply patch %d\n", ret);
|
|
goto err_reset;
|
|
}
|
|
}
|
|
|
|
/* Init 32k clock sourced from MCLK2 */
|
|
ret = clk_prepare_enable(madera->mclk[MADERA_MCLK2].clk);
|
|
if (ret) {
|
|
dev_err(madera->dev, "Failed to enable 32k clock: %d\n", ret);
|
|
goto err_reset;
|
|
}
|
|
|
|
ret = regmap_update_bits(madera->regmap,
|
|
MADERA_CLOCK_32K_1,
|
|
MADERA_CLK_32K_ENA_MASK | MADERA_CLK_32K_SRC_MASK,
|
|
MADERA_CLK_32K_ENA | MADERA_32KZ_MCLK2);
|
|
if (ret) {
|
|
dev_err(madera->dev, "Failed to init 32k clock: %d\n", ret);
|
|
goto err_clock;
|
|
}
|
|
|
|
pm_runtime_set_active(madera->dev);
|
|
pm_runtime_enable(madera->dev);
|
|
pm_runtime_set_autosuspend_delay(madera->dev, 100);
|
|
pm_runtime_use_autosuspend(madera->dev);
|
|
|
|
/* No devm_ because we need to control shutdown order of children */
|
|
ret = mfd_add_devices(madera->dev, PLATFORM_DEVID_NONE,
|
|
mfd_devs, n_devs,
|
|
NULL, 0, NULL);
|
|
if (ret) {
|
|
dev_err(madera->dev, "Failed to add subdevices: %d\n", ret);
|
|
goto err_pm_runtime;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_pm_runtime:
|
|
pm_runtime_disable(madera->dev);
|
|
err_clock:
|
|
clk_disable_unprepare(madera->mclk[MADERA_MCLK2].clk);
|
|
err_reset:
|
|
madera_enable_hard_reset(madera);
|
|
regulator_disable(madera->dcvdd);
|
|
err_enable:
|
|
regulator_bulk_disable(madera->num_core_supplies,
|
|
madera->core_supplies);
|
|
err_dcvdd:
|
|
regulator_put(madera->dcvdd);
|
|
err_devs:
|
|
mfd_remove_devices(dev);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(madera_dev_init);
|
|
|
|
int madera_dev_exit(struct madera *madera)
|
|
{
|
|
/* Prevent any IRQs being serviced while we clean up */
|
|
disable_irq(madera->irq);
|
|
|
|
pm_runtime_get_sync(madera->dev);
|
|
|
|
mfd_remove_devices(madera->dev);
|
|
|
|
pm_runtime_disable(madera->dev);
|
|
|
|
regulator_disable(madera->dcvdd);
|
|
regulator_put(madera->dcvdd);
|
|
|
|
mfd_remove_devices_late(madera->dev);
|
|
|
|
pm_runtime_set_suspended(madera->dev);
|
|
pm_runtime_put_noidle(madera->dev);
|
|
|
|
clk_disable_unprepare(madera->mclk[MADERA_MCLK2].clk);
|
|
|
|
madera_enable_hard_reset(madera);
|
|
|
|
regulator_bulk_disable(madera->num_core_supplies,
|
|
madera->core_supplies);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(madera_dev_exit);
|
|
|
|
MODULE_DESCRIPTION("Madera core MFD driver");
|
|
MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");
|
|
MODULE_LICENSE("GPL v2");
|