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278b45b06b
Both IRQ and GPIO controllers can now be represented in DT. The IRQ controllers are setup first, and then the GPIO controllers. Interrupts for GPIO lines are placed directly after the main interrupts in the interrupt space. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@googlemail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Josh Coombs <josh.coombs@gmail.com> Tested-by: Simon Baatz <gmbnomis@gmail.com>
34 lines
855 B
C
34 lines
855 B
C
/*
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* arch/arm/mach-orion5x/irq.c
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*
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* Core IRQ functions for Marvell Orion System On Chip
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*
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* Maintainer: Tzachi Perelstein <tzachi@marvell.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/gpio.h>
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#include <linux/kernel.h>
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#include <linux/irq.h>
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#include <mach/bridge-regs.h>
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#include <plat/irq.h>
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static int __initdata gpio0_irqs[4] = {
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IRQ_ORION5X_GPIO_0_7,
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IRQ_ORION5X_GPIO_8_15,
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IRQ_ORION5X_GPIO_16_23,
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IRQ_ORION5X_GPIO_24_31,
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};
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void __init orion5x_init_irq(void)
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{
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orion_irq_init(0, (void __iomem *)MAIN_IRQ_MASK);
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/*
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* Initialize gpiolib for GPIOs 0-31.
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*/
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orion_gpio_init(NULL, 0, 32, (void __iomem *)GPIO_VIRT_BASE, 0,
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IRQ_ORION5X_GPIO_START, gpio0_irqs);
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}
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