Dmitry Osipenko 66ee50c6e2 soc/tegra: pmc: Ensure that clock rates aren't too high ... Switch all clocks of a power domain to a safe rate which is suitable for all possible voltages in order to ensure that hardware constraints aren't violated when power domain state toggles. Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30 Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124 Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30 Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>		2021-03-26 13:10:25 +01:00
..
fuse	soc/tegra: Changes for v5.11-rc1	2020-11-27 17:56:10 +01:00
common.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
flowctrl.c	remove ioremap_nocache and devm_ioremap_nocache	2020-01-06 09:45:59 +01:00
Kconfig	arm64: tegra: Initial Tegra234 VDK support	2020-09-18 15:58:07 +02:00
Makefile	soc/tegra: regulators: Add regulators coupler for Tegra30	2019-10-29 14:02:59 +01:00
pmc.c	soc/tegra: pmc: Ensure that clock rates aren't too high	2021-03-26 13:10:25 +01:00
powergate-bpmp.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288	2019-06-05 17:36:37 +02:00
regulators-tegra20.c	soc/tegra: regulators: Do nothing if voltage is unchanged	2020-01-10 15:42:58 +01:00
regulators-tegra30.c	soc/tegra: regulators: Fix locking up when voltage-spread is out of range	2021-03-26 13:10:25 +01:00