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![]() GICv3 offers the possibility to signal SPIs using a pair of doorbells (SETPI, CLRSPI) under the name of Message Based Interrupts (MBI). They can be used as either traditional (edge) MSIs, or the more exotic level-triggered flavour. Let's implement support for platform MSI, which is the original intent for this feature. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Rob Herring <robh@kernel.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lkml.kernel.org/r/20180508121438.11301-8-marc.zyngier@arm.com |
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.. | ||
arm-gic-common.h | ||
arm-gic-v3.h | ||
arm-gic-v4.h | ||
arm-gic.h | ||
arm-vic.h | ||
chained_irq.h | ||
ingenic.h | ||
irq-bcm2836.h | ||
irq-omap-intc.h | ||
irq-partition-percpu.h | ||
irq-sa11x0.h | ||
mmp.h | ||
mxs.h | ||
versatile-fpga.h | ||
xtensa-mx.h | ||
xtensa-pic.h |