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c73cc120a3
Aarch64 instructions must be word aligned. The current 16 byte alignment is more than enough. Relax it into 4 byte alignment. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
7 lines
114 B
C
7 lines
114 B
C
#ifndef __ASM_LINKAGE_H
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#define __ASM_LINKAGE_H
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#define __ALIGN .align 2
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#define __ALIGN_STR ".align 2"
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#endif
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