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![Linus Torvalds](/assets/img/avatar_default.png)
Including: - Core changes: - Consolidate probe_device path - Make the PCI-SAC IOVA allocation trick PCI-only - AMD IOMMU: - Consolidate PPR log handling - Interrupt handling improvements - Refcount fixes for amd_iommu_v2 driver - Intel VT-d driver: - Enable idxd device DMA with pasid through iommu dma ops. - Lift RESV_DIRECT check from VT-d driver to core. - Miscellaneous cleanups and fixes. - ARM-SMMU drivers: - Device-tree binding updates: - Add additional compatible strings for Qualcomm SoCs - Allow ASIDs to be configured in the DT to work around Qualcomm's broken hypervisor - Fix clocks for Qualcomm's MSM8998 SoC - SMMUv2: - Support for Qualcomm's legacy firmware implementation featured on at least MSM8956 and MSM8976. - Match compatible strings for Qualcomm SM6350 and SM6375 SoC variants - SMMUv3: - Use 'ida' instead of a bitmap for VMID allocation - Rockchip IOMMU: - Lift page-table allocation restrictions on newer hardware - Mediatek IOMMU: - Add MT8188 IOMMU Support - Renesas IOMMU: - Allow PCIe devices - Usual set of cleanups an smaller fixes -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAmTx7IMACgkQK/BELZcB GuMxUA/+P/wYvAKCbDpXyszIpyCTx37BkeRTBaVqG0vEKLG6439i+PIm3oudQK+6 0y+1clJi0Ddu0uv1ck90cIEP1YDuKaKdrOVeE7TtlK+6LKYxTyeN+mz4csMIbahI 6JMrWzrIEPIyMBHzAepQiGDCsmDkrCngPj0WmA7+EQZSSHVYp+TLe6OLzNs74vDF zCITkYNq6aKyg/dNJpMRy6VOHvw9PUiwRvm7ko7WONP4VCtpW4g3Jpkerf19zoV2 s0nwZuGn3o7F0aFOpRJPPKQNfQnNjOjHdxjcsGBafD9qqAk4TLvnZH24njKtPidJ P8CiAu//HxhDyUPTgTIrDroVOGVG7s85XO+WesjPkEI3vnNjXy+qEIinQBJ3oIaI ppDLSnArEhfSRgt6dXvPCJ/g4+WGS9jNV85GCa7XBtal2Msu8G89NKC97mpmjCkb lnGmCF9t7Tkt/fLWxw4GADBN3m2tOib1GQMvPYAF2WM3jH5aRq2UliIRuCHZkzwv EF3SiFQQqab6oogU9tF/A1QLUKQ8QfYOdabqL9z2COgF5tS00VC6b/6VTNkKeBHe qIiOpI7IWo76tFJule5gRaUth9nVkjpEo6kL9I6rEldOlFJrX6uaHTta6/isY3gx vkN98V/OThRUbDwMD122YVKNNjZE2MNsTeptXqB3jHvl3UWiLsQ= =RV+G -----END PGP SIGNATURE----- Merge tag 'iommu-updates-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu updates from Joerg Roedel: "Core changes: - Consolidate probe_device path - Make the PCI-SAC IOVA allocation trick PCI-only AMD IOMMU: - Consolidate PPR log handling - Interrupt handling improvements - Refcount fixes for amd_iommu_v2 driver Intel VT-d driver: - Enable idxd device DMA with pasid through iommu dma ops - Lift RESV_DIRECT check from VT-d driver to core - Miscellaneous cleanups and fixes ARM-SMMU drivers: - Device-tree binding updates: - Add additional compatible strings for Qualcomm SoCs - Allow ASIDs to be configured in the DT to work around Qualcomm's broken hypervisor - Fix clocks for Qualcomm's MSM8998 SoC - SMMUv2: - Support for Qualcomm's legacy firmware implementation featured on at least MSM8956 and MSM8976 - Match compatible strings for Qualcomm SM6350 and SM6375 SoC variants - SMMUv3: - Use 'ida' instead of a bitmap for VMID allocation - Rockchip IOMMU: - Lift page-table allocation restrictions on newer hardware - Mediatek IOMMU: - Add MT8188 IOMMU Support - Renesas IOMMU: - Allow PCIe devices .. and the usual set of cleanups an smaller fixes" * tag 'iommu-updates-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (64 commits) iommu: Explicitly include correct DT includes iommu/amd: Remove unused declarations iommu/arm-smmu-qcom: Add SM6375 SMMUv2 iommu/arm-smmu-qcom: Add SM6350 DPU compatible iommu/arm-smmu-qcom: Add SM6375 DPU compatible iommu/arm-smmu-qcom: Sort the compatible list alphabetically dt-bindings: arm-smmu: Fix MSM8998 clocks description iommu/vt-d: Remove unused extern declaration dmar_parse_dev_scope() iommu/vt-d: Fix to convert mm pfn to dma pfn iommu/vt-d: Fix to flush cache of PASID directory table iommu/vt-d: Remove rmrr check in domain attaching device path iommu: Prevent RESV_DIRECT devices from blocking domains dmaengine/idxd: Re-enable kernel workqueue under DMA API iommu/vt-d: Add set_dev_pasid callback for dma domain iommu/vt-d: Prepare for set_dev_pasid callback iommu/vt-d: Make prq draining code generic iommu/vt-d: Remove pasid_mutex iommu/vt-d: Add domain_flush_pasid_iotlb() iommu: Move global PASID allocation from SVA to core iommu: Generalize PASID 0 for normal DMA w/o PASID ...
1217 lines
37 KiB
C
1217 lines
37 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
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* Author: Joerg Roedel <joerg.roedel@amd.com>
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*/
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#ifndef __LINUX_IOMMU_H
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#define __LINUX_IOMMU_H
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#include <linux/scatterlist.h>
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#include <linux/device.h>
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <uapi/linux/iommu.h>
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#define IOMMU_READ (1 << 0)
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#define IOMMU_WRITE (1 << 1)
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#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
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#define IOMMU_NOEXEC (1 << 3)
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#define IOMMU_MMIO (1 << 4) /* e.g. things like MSI doorbells */
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/*
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* Where the bus hardware includes a privilege level as part of its access type
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* markings, and certain devices are capable of issuing transactions marked as
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* either 'supervisor' or 'user', the IOMMU_PRIV flag requests that the other
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* given permission flags only apply to accesses at the higher privilege level,
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* and that unprivileged transactions should have as little access as possible.
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* This would usually imply the same permissions as kernel mappings on the CPU,
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* if the IOMMU page table format is equivalent.
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*/
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#define IOMMU_PRIV (1 << 5)
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struct iommu_ops;
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struct iommu_group;
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struct bus_type;
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struct device;
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struct iommu_domain;
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struct iommu_domain_ops;
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struct notifier_block;
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struct iommu_sva;
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struct iommu_fault_event;
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struct iommu_dma_cookie;
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/* iommu fault flags */
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#define IOMMU_FAULT_READ 0x0
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#define IOMMU_FAULT_WRITE 0x1
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typedef int (*iommu_fault_handler_t)(struct iommu_domain *,
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struct device *, unsigned long, int, void *);
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typedef int (*iommu_dev_fault_handler_t)(struct iommu_fault *, void *);
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struct iommu_domain_geometry {
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dma_addr_t aperture_start; /* First address that can be mapped */
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dma_addr_t aperture_end; /* Last address that can be mapped */
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bool force_aperture; /* DMA only allowed in mappable range? */
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};
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/* Domain feature flags */
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#define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */
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#define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API
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implementation */
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#define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */
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#define __IOMMU_DOMAIN_DMA_FQ (1U << 3) /* DMA-API uses flush queue */
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#define __IOMMU_DOMAIN_SVA (1U << 4) /* Shared process address space */
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#define IOMMU_DOMAIN_ALLOC_FLAGS ~__IOMMU_DOMAIN_DMA_FQ
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/*
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* This are the possible domain-types
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*
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* IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate
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* devices
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* IOMMU_DOMAIN_IDENTITY - DMA addresses are system physical addresses
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* IOMMU_DOMAIN_UNMANAGED - DMA mappings managed by IOMMU-API user, used
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* for VMs
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* IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations.
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* This flag allows IOMMU drivers to implement
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* certain optimizations for these domains
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* IOMMU_DOMAIN_DMA_FQ - As above, but definitely using batched TLB
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* invalidation.
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* IOMMU_DOMAIN_SVA - DMA addresses are shared process addresses
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* represented by mm_struct's.
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*/
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#define IOMMU_DOMAIN_BLOCKED (0U)
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#define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT)
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#define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING)
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#define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \
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__IOMMU_DOMAIN_DMA_API)
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#define IOMMU_DOMAIN_DMA_FQ (__IOMMU_DOMAIN_PAGING | \
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__IOMMU_DOMAIN_DMA_API | \
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__IOMMU_DOMAIN_DMA_FQ)
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#define IOMMU_DOMAIN_SVA (__IOMMU_DOMAIN_SVA)
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struct iommu_domain {
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unsigned type;
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const struct iommu_domain_ops *ops;
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unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */
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struct iommu_domain_geometry geometry;
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struct iommu_dma_cookie *iova_cookie;
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enum iommu_page_response_code (*iopf_handler)(struct iommu_fault *fault,
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void *data);
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void *fault_data;
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union {
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struct {
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iommu_fault_handler_t handler;
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void *handler_token;
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};
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struct { /* IOMMU_DOMAIN_SVA */
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struct mm_struct *mm;
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int users;
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};
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};
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};
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static inline bool iommu_is_dma_domain(struct iommu_domain *domain)
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{
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return domain->type & __IOMMU_DOMAIN_DMA_API;
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}
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enum iommu_cap {
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IOMMU_CAP_CACHE_COHERENCY, /* IOMMU_CACHE is supported */
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IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */
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IOMMU_CAP_PRE_BOOT_PROTECTION, /* Firmware says it used the IOMMU for
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DMA protection and we should too */
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/*
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* Per-device flag indicating if enforce_cache_coherency() will work on
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* this device.
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*/
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IOMMU_CAP_ENFORCE_CACHE_COHERENCY,
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/*
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* IOMMU driver does not issue TLB maintenance during .unmap, so can
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* usefully support the non-strict DMA flush queue.
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*/
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IOMMU_CAP_DEFERRED_FLUSH,
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};
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/* These are the possible reserved region types */
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enum iommu_resv_type {
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/* Memory regions which must be mapped 1:1 at all times */
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IOMMU_RESV_DIRECT,
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/*
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* Memory regions which are advertised to be 1:1 but are
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* commonly considered relaxable in some conditions,
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* for instance in device assignment use case (USB, Graphics)
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*/
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IOMMU_RESV_DIRECT_RELAXABLE,
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/* Arbitrary "never map this or give it to a device" address ranges */
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IOMMU_RESV_RESERVED,
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/* Hardware MSI region (untranslated) */
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IOMMU_RESV_MSI,
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/* Software-managed MSI translation window */
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IOMMU_RESV_SW_MSI,
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};
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/**
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* struct iommu_resv_region - descriptor for a reserved memory region
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* @list: Linked list pointers
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* @start: System physical start address of the region
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* @length: Length of the region in bytes
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* @prot: IOMMU Protection flags (READ/WRITE/...)
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* @type: Type of the reserved region
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* @free: Callback to free associated memory allocations
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*/
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struct iommu_resv_region {
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struct list_head list;
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phys_addr_t start;
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size_t length;
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int prot;
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enum iommu_resv_type type;
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void (*free)(struct device *dev, struct iommu_resv_region *region);
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};
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struct iommu_iort_rmr_data {
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struct iommu_resv_region rr;
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/* Stream IDs associated with IORT RMR entry */
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const u32 *sids;
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u32 num_sids;
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};
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/**
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* enum iommu_dev_features - Per device IOMMU features
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* @IOMMU_DEV_FEAT_SVA: Shared Virtual Addresses
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* @IOMMU_DEV_FEAT_IOPF: I/O Page Faults such as PRI or Stall. Generally
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* enabling %IOMMU_DEV_FEAT_SVA requires
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* %IOMMU_DEV_FEAT_IOPF, but some devices manage I/O Page
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* Faults themselves instead of relying on the IOMMU. When
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* supported, this feature must be enabled before and
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* disabled after %IOMMU_DEV_FEAT_SVA.
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*
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* Device drivers enable a feature using iommu_dev_enable_feature().
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*/
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enum iommu_dev_features {
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IOMMU_DEV_FEAT_SVA,
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IOMMU_DEV_FEAT_IOPF,
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};
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#define IOMMU_NO_PASID (0U) /* Reserved for DMA w/o PASID */
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#define IOMMU_FIRST_GLOBAL_PASID (1U) /*starting range for allocation */
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#define IOMMU_PASID_INVALID (-1U)
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typedef unsigned int ioasid_t;
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#ifdef CONFIG_IOMMU_API
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/**
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* struct iommu_iotlb_gather - Range information for a pending IOTLB flush
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*
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* @start: IOVA representing the start of the range to be flushed
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* @end: IOVA representing the end of the range to be flushed (inclusive)
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* @pgsize: The interval at which to perform the flush
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* @freelist: Removed pages to free after sync
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* @queued: Indicates that the flush will be queued
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*
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* This structure is intended to be updated by multiple calls to the
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* ->unmap() function in struct iommu_ops before eventually being passed
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* into ->iotlb_sync(). Drivers can add pages to @freelist to be freed after
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* ->iotlb_sync() or ->iotlb_flush_all() have cleared all cached references to
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* them. @queued is set to indicate when ->iotlb_flush_all() will be called
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* later instead of ->iotlb_sync(), so drivers may optimise accordingly.
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*/
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struct iommu_iotlb_gather {
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unsigned long start;
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unsigned long end;
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size_t pgsize;
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struct list_head freelist;
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bool queued;
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};
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/**
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* struct iommu_ops - iommu ops and capabilities
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* @capable: check capability
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* @hw_info: report iommu hardware information. The data buffer returned by this
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* op is allocated in the iommu driver and freed by the caller after
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* use. The information type is one of enum iommu_hw_info_type defined
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* in include/uapi/linux/iommufd.h.
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* @domain_alloc: allocate iommu domain
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* @probe_device: Add device to iommu driver handling
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* @release_device: Remove device from iommu driver handling
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* @probe_finalize: Do final setup work after the device is added to an IOMMU
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* group and attached to the groups domain
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* @set_platform_dma_ops: Returning control back to the platform DMA ops. This op
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* is to support old IOMMU drivers, new drivers should use
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* default domains, and the common IOMMU DMA ops.
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* @device_group: find iommu group for a particular device
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* @get_resv_regions: Request list of reserved regions for a device
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* @of_xlate: add OF master IDs to iommu grouping
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* @is_attach_deferred: Check if domain attach should be deferred from iommu
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* driver init to device driver init (default no)
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* @dev_enable/disable_feat: per device entries to enable/disable
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* iommu specific features.
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* @page_response: handle page request response
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* @def_domain_type: device default domain type, return value:
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* - IOMMU_DOMAIN_IDENTITY: must use an identity domain
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* - IOMMU_DOMAIN_DMA: must use a dma domain
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* - 0: use the default setting
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* @default_domain_ops: the default ops for domains
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* @remove_dev_pasid: Remove any translation configurations of a specific
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* pasid, so that any DMA transactions with this pasid
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* will be blocked by the hardware.
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* @pgsize_bitmap: bitmap of all possible supported page sizes
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* @owner: Driver module providing these ops
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*/
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struct iommu_ops {
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bool (*capable)(struct device *dev, enum iommu_cap);
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void *(*hw_info)(struct device *dev, u32 *length, u32 *type);
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/* Domain allocation and freeing by the iommu driver */
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struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type);
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struct iommu_device *(*probe_device)(struct device *dev);
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void (*release_device)(struct device *dev);
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void (*probe_finalize)(struct device *dev);
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void (*set_platform_dma_ops)(struct device *dev);
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struct iommu_group *(*device_group)(struct device *dev);
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/* Request/Free a list of reserved regions for a device */
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void (*get_resv_regions)(struct device *dev, struct list_head *list);
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int (*of_xlate)(struct device *dev, struct of_phandle_args *args);
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bool (*is_attach_deferred)(struct device *dev);
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/* Per device IOMMU features */
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int (*dev_enable_feat)(struct device *dev, enum iommu_dev_features f);
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int (*dev_disable_feat)(struct device *dev, enum iommu_dev_features f);
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int (*page_response)(struct device *dev,
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struct iommu_fault_event *evt,
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struct iommu_page_response *msg);
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int (*def_domain_type)(struct device *dev);
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void (*remove_dev_pasid)(struct device *dev, ioasid_t pasid);
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const struct iommu_domain_ops *default_domain_ops;
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unsigned long pgsize_bitmap;
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struct module *owner;
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};
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/**
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* struct iommu_domain_ops - domain specific operations
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* @attach_dev: attach an iommu domain to a device
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* Return:
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* * 0 - success
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* * EINVAL - can indicate that device and domain are incompatible due to
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* some previous configuration of the domain, in which case the
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* driver shouldn't log an error, since it is legitimate for a
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* caller to test reuse of existing domains. Otherwise, it may
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* still represent some other fundamental problem
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* * ENOMEM - out of memory
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* * ENOSPC - non-ENOMEM type of resource allocation failures
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* * EBUSY - device is attached to a domain and cannot be changed
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* * ENODEV - device specific errors, not able to be attached
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* * <others> - treated as ENODEV by the caller. Use is discouraged
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* @set_dev_pasid: set an iommu domain to a pasid of device
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* @map: map a physically contiguous memory region to an iommu domain
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* @map_pages: map a physically contiguous set of pages of the same size to
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* an iommu domain.
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* @unmap: unmap a physically contiguous memory region from an iommu domain
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* @unmap_pages: unmap a number of pages of the same size from an iommu domain
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* @flush_iotlb_all: Synchronously flush all hardware TLBs for this domain
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* @iotlb_sync_map: Sync mappings created recently using @map to the hardware
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* @iotlb_sync: Flush all queued ranges from the hardware TLBs and empty flush
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* queue
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* @iova_to_phys: translate iova to physical address
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* @enforce_cache_coherency: Prevent any kind of DMA from bypassing IOMMU_CACHE,
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* including no-snoop TLPs on PCIe or other platform
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* specific mechanisms.
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* @enable_nesting: Enable nesting
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* @set_pgtable_quirks: Set io page table quirks (IO_PGTABLE_QUIRK_*)
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* @free: Release the domain after use.
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*/
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struct iommu_domain_ops {
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int (*attach_dev)(struct iommu_domain *domain, struct device *dev);
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int (*set_dev_pasid)(struct iommu_domain *domain, struct device *dev,
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ioasid_t pasid);
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int (*map)(struct iommu_domain *domain, unsigned long iova,
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phys_addr_t paddr, size_t size, int prot, gfp_t gfp);
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int (*map_pages)(struct iommu_domain *domain, unsigned long iova,
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phys_addr_t paddr, size_t pgsize, size_t pgcount,
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int prot, gfp_t gfp, size_t *mapped);
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size_t (*unmap)(struct iommu_domain *domain, unsigned long iova,
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size_t size, struct iommu_iotlb_gather *iotlb_gather);
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size_t (*unmap_pages)(struct iommu_domain *domain, unsigned long iova,
|
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size_t pgsize, size_t pgcount,
|
|
struct iommu_iotlb_gather *iotlb_gather);
|
|
|
|
void (*flush_iotlb_all)(struct iommu_domain *domain);
|
|
void (*iotlb_sync_map)(struct iommu_domain *domain, unsigned long iova,
|
|
size_t size);
|
|
void (*iotlb_sync)(struct iommu_domain *domain,
|
|
struct iommu_iotlb_gather *iotlb_gather);
|
|
|
|
phys_addr_t (*iova_to_phys)(struct iommu_domain *domain,
|
|
dma_addr_t iova);
|
|
|
|
bool (*enforce_cache_coherency)(struct iommu_domain *domain);
|
|
int (*enable_nesting)(struct iommu_domain *domain);
|
|
int (*set_pgtable_quirks)(struct iommu_domain *domain,
|
|
unsigned long quirks);
|
|
|
|
void (*free)(struct iommu_domain *domain);
|
|
};
|
|
|
|
/**
|
|
* struct iommu_device - IOMMU core representation of one IOMMU hardware
|
|
* instance
|
|
* @list: Used by the iommu-core to keep a list of registered iommus
|
|
* @ops: iommu-ops for talking to this iommu
|
|
* @dev: struct device for sysfs handling
|
|
* @max_pasids: number of supported PASIDs
|
|
*/
|
|
struct iommu_device {
|
|
struct list_head list;
|
|
const struct iommu_ops *ops;
|
|
struct fwnode_handle *fwnode;
|
|
struct device *dev;
|
|
u32 max_pasids;
|
|
};
|
|
|
|
/**
|
|
* struct iommu_fault_event - Generic fault event
|
|
*
|
|
* Can represent recoverable faults such as a page requests or
|
|
* unrecoverable faults such as DMA or IRQ remapping faults.
|
|
*
|
|
* @fault: fault descriptor
|
|
* @list: pending fault event list, used for tracking responses
|
|
*/
|
|
struct iommu_fault_event {
|
|
struct iommu_fault fault;
|
|
struct list_head list;
|
|
};
|
|
|
|
/**
|
|
* struct iommu_fault_param - per-device IOMMU fault data
|
|
* @handler: Callback function to handle IOMMU faults at device level
|
|
* @data: handler private data
|
|
* @faults: holds the pending faults which needs response
|
|
* @lock: protect pending faults list
|
|
*/
|
|
struct iommu_fault_param {
|
|
iommu_dev_fault_handler_t handler;
|
|
void *data;
|
|
struct list_head faults;
|
|
struct mutex lock;
|
|
};
|
|
|
|
/**
|
|
* struct dev_iommu - Collection of per-device IOMMU data
|
|
*
|
|
* @fault_param: IOMMU detected device fault reporting data
|
|
* @iopf_param: I/O Page Fault queue and data
|
|
* @fwspec: IOMMU fwspec data
|
|
* @iommu_dev: IOMMU device this device is linked to
|
|
* @priv: IOMMU Driver private data
|
|
* @max_pasids: number of PASIDs this device can consume
|
|
* @attach_deferred: the dma domain attachment is deferred
|
|
* @pci_32bit_workaround: Limit DMA allocations to 32-bit IOVAs
|
|
* @require_direct: device requires IOMMU_RESV_DIRECT regions
|
|
*
|
|
* TODO: migrate other per device data pointers under iommu_dev_data, e.g.
|
|
* struct iommu_group *iommu_group;
|
|
*/
|
|
struct dev_iommu {
|
|
struct mutex lock;
|
|
struct iommu_fault_param *fault_param;
|
|
struct iopf_device_param *iopf_param;
|
|
struct iommu_fwspec *fwspec;
|
|
struct iommu_device *iommu_dev;
|
|
void *priv;
|
|
u32 max_pasids;
|
|
u32 attach_deferred:1;
|
|
u32 pci_32bit_workaround:1;
|
|
u32 require_direct:1;
|
|
};
|
|
|
|
int iommu_device_register(struct iommu_device *iommu,
|
|
const struct iommu_ops *ops,
|
|
struct device *hwdev);
|
|
void iommu_device_unregister(struct iommu_device *iommu);
|
|
int iommu_device_sysfs_add(struct iommu_device *iommu,
|
|
struct device *parent,
|
|
const struct attribute_group **groups,
|
|
const char *fmt, ...) __printf(4, 5);
|
|
void iommu_device_sysfs_remove(struct iommu_device *iommu);
|
|
int iommu_device_link(struct iommu_device *iommu, struct device *link);
|
|
void iommu_device_unlink(struct iommu_device *iommu, struct device *link);
|
|
int iommu_deferred_attach(struct device *dev, struct iommu_domain *domain);
|
|
|
|
static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
|
|
{
|
|
return (struct iommu_device *)dev_get_drvdata(dev);
|
|
}
|
|
|
|
static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather)
|
|
{
|
|
*gather = (struct iommu_iotlb_gather) {
|
|
.start = ULONG_MAX,
|
|
.freelist = LIST_HEAD_INIT(gather->freelist),
|
|
};
|
|
}
|
|
|
|
extern int bus_iommu_probe(const struct bus_type *bus);
|
|
extern bool iommu_present(const struct bus_type *bus);
|
|
extern bool device_iommu_capable(struct device *dev, enum iommu_cap cap);
|
|
extern bool iommu_group_has_isolated_msi(struct iommu_group *group);
|
|
extern struct iommu_domain *iommu_domain_alloc(const struct bus_type *bus);
|
|
extern void iommu_domain_free(struct iommu_domain *domain);
|
|
extern int iommu_attach_device(struct iommu_domain *domain,
|
|
struct device *dev);
|
|
extern void iommu_detach_device(struct iommu_domain *domain,
|
|
struct device *dev);
|
|
extern int iommu_sva_unbind_gpasid(struct iommu_domain *domain,
|
|
struct device *dev, ioasid_t pasid);
|
|
extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev);
|
|
extern struct iommu_domain *iommu_get_dma_domain(struct device *dev);
|
|
extern int iommu_map(struct iommu_domain *domain, unsigned long iova,
|
|
phys_addr_t paddr, size_t size, int prot, gfp_t gfp);
|
|
extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova,
|
|
size_t size);
|
|
extern size_t iommu_unmap_fast(struct iommu_domain *domain,
|
|
unsigned long iova, size_t size,
|
|
struct iommu_iotlb_gather *iotlb_gather);
|
|
extern ssize_t iommu_map_sg(struct iommu_domain *domain, unsigned long iova,
|
|
struct scatterlist *sg, unsigned int nents,
|
|
int prot, gfp_t gfp);
|
|
extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova);
|
|
extern void iommu_set_fault_handler(struct iommu_domain *domain,
|
|
iommu_fault_handler_t handler, void *token);
|
|
|
|
extern void iommu_get_resv_regions(struct device *dev, struct list_head *list);
|
|
extern void iommu_put_resv_regions(struct device *dev, struct list_head *list);
|
|
extern void iommu_set_default_passthrough(bool cmd_line);
|
|
extern void iommu_set_default_translated(bool cmd_line);
|
|
extern bool iommu_default_passthrough(void);
|
|
extern struct iommu_resv_region *
|
|
iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot,
|
|
enum iommu_resv_type type, gfp_t gfp);
|
|
extern int iommu_get_group_resv_regions(struct iommu_group *group,
|
|
struct list_head *head);
|
|
|
|
extern int iommu_attach_group(struct iommu_domain *domain,
|
|
struct iommu_group *group);
|
|
extern void iommu_detach_group(struct iommu_domain *domain,
|
|
struct iommu_group *group);
|
|
extern struct iommu_group *iommu_group_alloc(void);
|
|
extern void *iommu_group_get_iommudata(struct iommu_group *group);
|
|
extern void iommu_group_set_iommudata(struct iommu_group *group,
|
|
void *iommu_data,
|
|
void (*release)(void *iommu_data));
|
|
extern int iommu_group_set_name(struct iommu_group *group, const char *name);
|
|
extern int iommu_group_add_device(struct iommu_group *group,
|
|
struct device *dev);
|
|
extern void iommu_group_remove_device(struct device *dev);
|
|
extern int iommu_group_for_each_dev(struct iommu_group *group, void *data,
|
|
int (*fn)(struct device *, void *));
|
|
extern struct iommu_group *iommu_group_get(struct device *dev);
|
|
extern struct iommu_group *iommu_group_ref_get(struct iommu_group *group);
|
|
extern void iommu_group_put(struct iommu_group *group);
|
|
extern int iommu_register_device_fault_handler(struct device *dev,
|
|
iommu_dev_fault_handler_t handler,
|
|
void *data);
|
|
|
|
extern int iommu_unregister_device_fault_handler(struct device *dev);
|
|
|
|
extern int iommu_report_device_fault(struct device *dev,
|
|
struct iommu_fault_event *evt);
|
|
extern int iommu_page_response(struct device *dev,
|
|
struct iommu_page_response *msg);
|
|
|
|
extern int iommu_group_id(struct iommu_group *group);
|
|
extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *);
|
|
|
|
int iommu_enable_nesting(struct iommu_domain *domain);
|
|
int iommu_set_pgtable_quirks(struct iommu_domain *domain,
|
|
unsigned long quirks);
|
|
|
|
void iommu_set_dma_strict(void);
|
|
|
|
extern int report_iommu_fault(struct iommu_domain *domain, struct device *dev,
|
|
unsigned long iova, int flags);
|
|
|
|
static inline void iommu_flush_iotlb_all(struct iommu_domain *domain)
|
|
{
|
|
if (domain->ops->flush_iotlb_all)
|
|
domain->ops->flush_iotlb_all(domain);
|
|
}
|
|
|
|
static inline void iommu_iotlb_sync(struct iommu_domain *domain,
|
|
struct iommu_iotlb_gather *iotlb_gather)
|
|
{
|
|
if (domain->ops->iotlb_sync)
|
|
domain->ops->iotlb_sync(domain, iotlb_gather);
|
|
|
|
iommu_iotlb_gather_init(iotlb_gather);
|
|
}
|
|
|
|
/**
|
|
* iommu_iotlb_gather_is_disjoint - Checks whether a new range is disjoint
|
|
*
|
|
* @gather: TLB gather data
|
|
* @iova: start of page to invalidate
|
|
* @size: size of page to invalidate
|
|
*
|
|
* Helper for IOMMU drivers to check whether a new range and the gathered range
|
|
* are disjoint. For many IOMMUs, flushing the IOMMU in this case is better
|
|
* than merging the two, which might lead to unnecessary invalidations.
|
|
*/
|
|
static inline
|
|
bool iommu_iotlb_gather_is_disjoint(struct iommu_iotlb_gather *gather,
|
|
unsigned long iova, size_t size)
|
|
{
|
|
unsigned long start = iova, end = start + size - 1;
|
|
|
|
return gather->end != 0 &&
|
|
(end + 1 < gather->start || start > gather->end + 1);
|
|
}
|
|
|
|
|
|
/**
|
|
* iommu_iotlb_gather_add_range - Gather for address-based TLB invalidation
|
|
* @gather: TLB gather data
|
|
* @iova: start of page to invalidate
|
|
* @size: size of page to invalidate
|
|
*
|
|
* Helper for IOMMU drivers to build arbitrarily-sized invalidation commands
|
|
* where only the address range matters, and simply minimising intermediate
|
|
* syncs is preferred.
|
|
*/
|
|
static inline void iommu_iotlb_gather_add_range(struct iommu_iotlb_gather *gather,
|
|
unsigned long iova, size_t size)
|
|
{
|
|
unsigned long end = iova + size - 1;
|
|
|
|
if (gather->start > iova)
|
|
gather->start = iova;
|
|
if (gather->end < end)
|
|
gather->end = end;
|
|
}
|
|
|
|
/**
|
|
* iommu_iotlb_gather_add_page - Gather for page-based TLB invalidation
|
|
* @domain: IOMMU domain to be invalidated
|
|
* @gather: TLB gather data
|
|
* @iova: start of page to invalidate
|
|
* @size: size of page to invalidate
|
|
*
|
|
* Helper for IOMMU drivers to build invalidation commands based on individual
|
|
* pages, or with page size/table level hints which cannot be gathered if they
|
|
* differ.
|
|
*/
|
|
static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain,
|
|
struct iommu_iotlb_gather *gather,
|
|
unsigned long iova, size_t size)
|
|
{
|
|
/*
|
|
* If the new page is disjoint from the current range or is mapped at
|
|
* a different granularity, then sync the TLB so that the gather
|
|
* structure can be rewritten.
|
|
*/
|
|
if ((gather->pgsize && gather->pgsize != size) ||
|
|
iommu_iotlb_gather_is_disjoint(gather, iova, size))
|
|
iommu_iotlb_sync(domain, gather);
|
|
|
|
gather->pgsize = size;
|
|
iommu_iotlb_gather_add_range(gather, iova, size);
|
|
}
|
|
|
|
static inline bool iommu_iotlb_gather_queued(struct iommu_iotlb_gather *gather)
|
|
{
|
|
return gather && gather->queued;
|
|
}
|
|
|
|
/* PCI device grouping function */
|
|
extern struct iommu_group *pci_device_group(struct device *dev);
|
|
/* Generic device grouping function */
|
|
extern struct iommu_group *generic_device_group(struct device *dev);
|
|
/* FSL-MC device grouping function */
|
|
struct iommu_group *fsl_mc_device_group(struct device *dev);
|
|
|
|
/**
|
|
* struct iommu_fwspec - per-device IOMMU instance data
|
|
* @ops: ops for this device's IOMMU
|
|
* @iommu_fwnode: firmware handle for this device's IOMMU
|
|
* @flags: IOMMU_FWSPEC_* flags
|
|
* @num_ids: number of associated device IDs
|
|
* @ids: IDs which this device may present to the IOMMU
|
|
*
|
|
* Note that the IDs (and any other information, really) stored in this structure should be
|
|
* considered private to the IOMMU device driver and are not to be used directly by IOMMU
|
|
* consumers.
|
|
*/
|
|
struct iommu_fwspec {
|
|
const struct iommu_ops *ops;
|
|
struct fwnode_handle *iommu_fwnode;
|
|
u32 flags;
|
|
unsigned int num_ids;
|
|
u32 ids[];
|
|
};
|
|
|
|
/* ATS is supported */
|
|
#define IOMMU_FWSPEC_PCI_RC_ATS (1 << 0)
|
|
|
|
/**
|
|
* struct iommu_sva - handle to a device-mm bond
|
|
*/
|
|
struct iommu_sva {
|
|
struct device *dev;
|
|
struct iommu_domain *domain;
|
|
};
|
|
|
|
int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode,
|
|
const struct iommu_ops *ops);
|
|
void iommu_fwspec_free(struct device *dev);
|
|
int iommu_fwspec_add_ids(struct device *dev, u32 *ids, int num_ids);
|
|
const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode);
|
|
|
|
static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
|
|
{
|
|
if (dev->iommu)
|
|
return dev->iommu->fwspec;
|
|
else
|
|
return NULL;
|
|
}
|
|
|
|
static inline void dev_iommu_fwspec_set(struct device *dev,
|
|
struct iommu_fwspec *fwspec)
|
|
{
|
|
dev->iommu->fwspec = fwspec;
|
|
}
|
|
|
|
static inline void *dev_iommu_priv_get(struct device *dev)
|
|
{
|
|
if (dev->iommu)
|
|
return dev->iommu->priv;
|
|
else
|
|
return NULL;
|
|
}
|
|
|
|
static inline void dev_iommu_priv_set(struct device *dev, void *priv)
|
|
{
|
|
dev->iommu->priv = priv;
|
|
}
|
|
|
|
int iommu_probe_device(struct device *dev);
|
|
|
|
int iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features f);
|
|
int iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features f);
|
|
|
|
int iommu_device_use_default_domain(struct device *dev);
|
|
void iommu_device_unuse_default_domain(struct device *dev);
|
|
|
|
int iommu_group_claim_dma_owner(struct iommu_group *group, void *owner);
|
|
void iommu_group_release_dma_owner(struct iommu_group *group);
|
|
bool iommu_group_dma_owner_claimed(struct iommu_group *group);
|
|
|
|
int iommu_device_claim_dma_owner(struct device *dev, void *owner);
|
|
void iommu_device_release_dma_owner(struct device *dev);
|
|
|
|
struct iommu_domain *iommu_sva_domain_alloc(struct device *dev,
|
|
struct mm_struct *mm);
|
|
int iommu_attach_device_pasid(struct iommu_domain *domain,
|
|
struct device *dev, ioasid_t pasid);
|
|
void iommu_detach_device_pasid(struct iommu_domain *domain,
|
|
struct device *dev, ioasid_t pasid);
|
|
struct iommu_domain *
|
|
iommu_get_domain_for_dev_pasid(struct device *dev, ioasid_t pasid,
|
|
unsigned int type);
|
|
ioasid_t iommu_alloc_global_pasid(struct device *dev);
|
|
void iommu_free_global_pasid(ioasid_t pasid);
|
|
#else /* CONFIG_IOMMU_API */
|
|
|
|
struct iommu_ops {};
|
|
struct iommu_group {};
|
|
struct iommu_fwspec {};
|
|
struct iommu_device {};
|
|
struct iommu_fault_param {};
|
|
struct iommu_iotlb_gather {};
|
|
|
|
static inline bool iommu_present(const struct bus_type *bus)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline bool device_iommu_capable(struct device *dev, enum iommu_cap cap)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline struct iommu_domain *iommu_domain_alloc(const struct bus_type *bus)
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
static inline void iommu_domain_free(struct iommu_domain *domain)
|
|
{
|
|
}
|
|
|
|
static inline int iommu_attach_device(struct iommu_domain *domain,
|
|
struct device *dev)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline void iommu_detach_device(struct iommu_domain *domain,
|
|
struct device *dev)
|
|
{
|
|
}
|
|
|
|
static inline struct iommu_domain *iommu_get_domain_for_dev(struct device *dev)
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
static inline int iommu_map(struct iommu_domain *domain, unsigned long iova,
|
|
phys_addr_t paddr, size_t size, int prot, gfp_t gfp)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline size_t iommu_unmap(struct iommu_domain *domain,
|
|
unsigned long iova, size_t size)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline size_t iommu_unmap_fast(struct iommu_domain *domain,
|
|
unsigned long iova, int gfp_order,
|
|
struct iommu_iotlb_gather *iotlb_gather)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline ssize_t iommu_map_sg(struct iommu_domain *domain,
|
|
unsigned long iova, struct scatterlist *sg,
|
|
unsigned int nents, int prot, gfp_t gfp)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline void iommu_flush_iotlb_all(struct iommu_domain *domain)
|
|
{
|
|
}
|
|
|
|
static inline void iommu_iotlb_sync(struct iommu_domain *domain,
|
|
struct iommu_iotlb_gather *iotlb_gather)
|
|
{
|
|
}
|
|
|
|
static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline void iommu_set_fault_handler(struct iommu_domain *domain,
|
|
iommu_fault_handler_t handler, void *token)
|
|
{
|
|
}
|
|
|
|
static inline void iommu_get_resv_regions(struct device *dev,
|
|
struct list_head *list)
|
|
{
|
|
}
|
|
|
|
static inline void iommu_put_resv_regions(struct device *dev,
|
|
struct list_head *list)
|
|
{
|
|
}
|
|
|
|
static inline int iommu_get_group_resv_regions(struct iommu_group *group,
|
|
struct list_head *head)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline void iommu_set_default_passthrough(bool cmd_line)
|
|
{
|
|
}
|
|
|
|
static inline void iommu_set_default_translated(bool cmd_line)
|
|
{
|
|
}
|
|
|
|
static inline bool iommu_default_passthrough(void)
|
|
{
|
|
return true;
|
|
}
|
|
|
|
static inline int iommu_attach_group(struct iommu_domain *domain,
|
|
struct iommu_group *group)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline void iommu_detach_group(struct iommu_domain *domain,
|
|
struct iommu_group *group)
|
|
{
|
|
}
|
|
|
|
static inline struct iommu_group *iommu_group_alloc(void)
|
|
{
|
|
return ERR_PTR(-ENODEV);
|
|
}
|
|
|
|
static inline void *iommu_group_get_iommudata(struct iommu_group *group)
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
static inline void iommu_group_set_iommudata(struct iommu_group *group,
|
|
void *iommu_data,
|
|
void (*release)(void *iommu_data))
|
|
{
|
|
}
|
|
|
|
static inline int iommu_group_set_name(struct iommu_group *group,
|
|
const char *name)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline int iommu_group_add_device(struct iommu_group *group,
|
|
struct device *dev)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline void iommu_group_remove_device(struct device *dev)
|
|
{
|
|
}
|
|
|
|
static inline int iommu_group_for_each_dev(struct iommu_group *group,
|
|
void *data,
|
|
int (*fn)(struct device *, void *))
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline struct iommu_group *iommu_group_get(struct device *dev)
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
static inline void iommu_group_put(struct iommu_group *group)
|
|
{
|
|
}
|
|
|
|
static inline
|
|
int iommu_register_device_fault_handler(struct device *dev,
|
|
iommu_dev_fault_handler_t handler,
|
|
void *data)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline int iommu_unregister_device_fault_handler(struct device *dev)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline
|
|
int iommu_report_device_fault(struct device *dev, struct iommu_fault_event *evt)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline int iommu_page_response(struct device *dev,
|
|
struct iommu_page_response *msg)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline int iommu_group_id(struct iommu_group *group)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline int iommu_set_pgtable_quirks(struct iommu_domain *domain,
|
|
unsigned long quirks)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline int iommu_device_register(struct iommu_device *iommu,
|
|
const struct iommu_ops *ops,
|
|
struct device *hwdev)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather)
|
|
{
|
|
}
|
|
|
|
static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain,
|
|
struct iommu_iotlb_gather *gather,
|
|
unsigned long iova, size_t size)
|
|
{
|
|
}
|
|
|
|
static inline bool iommu_iotlb_gather_queued(struct iommu_iotlb_gather *gather)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline void iommu_device_unregister(struct iommu_device *iommu)
|
|
{
|
|
}
|
|
|
|
static inline int iommu_device_sysfs_add(struct iommu_device *iommu,
|
|
struct device *parent,
|
|
const struct attribute_group **groups,
|
|
const char *fmt, ...)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline void iommu_device_sysfs_remove(struct iommu_device *iommu)
|
|
{
|
|
}
|
|
|
|
static inline int iommu_device_link(struct device *dev, struct device *link)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
static inline void iommu_device_unlink(struct device *dev, struct device *link)
|
|
{
|
|
}
|
|
|
|
static inline int iommu_fwspec_init(struct device *dev,
|
|
struct fwnode_handle *iommu_fwnode,
|
|
const struct iommu_ops *ops)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline void iommu_fwspec_free(struct device *dev)
|
|
{
|
|
}
|
|
|
|
static inline int iommu_fwspec_add_ids(struct device *dev, u32 *ids,
|
|
int num_ids)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline
|
|
const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode)
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
static inline int
|
|
iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features feat)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline int
|
|
iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features feat)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
static inline int iommu_device_use_default_domain(struct device *dev)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline void iommu_device_unuse_default_domain(struct device *dev)
|
|
{
|
|
}
|
|
|
|
static inline int
|
|
iommu_group_claim_dma_owner(struct iommu_group *group, void *owner)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline void iommu_group_release_dma_owner(struct iommu_group *group)
|
|
{
|
|
}
|
|
|
|
static inline bool iommu_group_dma_owner_claimed(struct iommu_group *group)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline void iommu_device_release_dma_owner(struct device *dev)
|
|
{
|
|
}
|
|
|
|
static inline int iommu_device_claim_dma_owner(struct device *dev, void *owner)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline struct iommu_domain *
|
|
iommu_sva_domain_alloc(struct device *dev, struct mm_struct *mm)
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
static inline int iommu_attach_device_pasid(struct iommu_domain *domain,
|
|
struct device *dev, ioasid_t pasid)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline void iommu_detach_device_pasid(struct iommu_domain *domain,
|
|
struct device *dev, ioasid_t pasid)
|
|
{
|
|
}
|
|
|
|
static inline struct iommu_domain *
|
|
iommu_get_domain_for_dev_pasid(struct device *dev, ioasid_t pasid,
|
|
unsigned int type)
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
static inline ioasid_t iommu_alloc_global_pasid(struct device *dev)
|
|
{
|
|
return IOMMU_PASID_INVALID;
|
|
}
|
|
|
|
static inline void iommu_free_global_pasid(ioasid_t pasid) {}
|
|
#endif /* CONFIG_IOMMU_API */
|
|
|
|
/**
|
|
* iommu_map_sgtable - Map the given buffer to the IOMMU domain
|
|
* @domain: The IOMMU domain to perform the mapping
|
|
* @iova: The start address to map the buffer
|
|
* @sgt: The sg_table object describing the buffer
|
|
* @prot: IOMMU protection bits
|
|
*
|
|
* Creates a mapping at @iova for the buffer described by a scatterlist
|
|
* stored in the given sg_table object in the provided IOMMU domain.
|
|
*/
|
|
static inline size_t iommu_map_sgtable(struct iommu_domain *domain,
|
|
unsigned long iova, struct sg_table *sgt, int prot)
|
|
{
|
|
return iommu_map_sg(domain, iova, sgt->sgl, sgt->orig_nents, prot,
|
|
GFP_KERNEL);
|
|
}
|
|
|
|
#ifdef CONFIG_IOMMU_DEBUGFS
|
|
extern struct dentry *iommu_debugfs_dir;
|
|
void iommu_debugfs_setup(void);
|
|
#else
|
|
static inline void iommu_debugfs_setup(void) {}
|
|
#endif
|
|
|
|
#ifdef CONFIG_IOMMU_DMA
|
|
#include <linux/msi.h>
|
|
|
|
/* Setup call for arch DMA mapping code */
|
|
void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 dma_limit);
|
|
|
|
int iommu_get_msi_cookie(struct iommu_domain *domain, dma_addr_t base);
|
|
|
|
int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr);
|
|
void iommu_dma_compose_msi_msg(struct msi_desc *desc, struct msi_msg *msg);
|
|
|
|
#else /* CONFIG_IOMMU_DMA */
|
|
|
|
struct msi_desc;
|
|
struct msi_msg;
|
|
|
|
static inline void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 dma_limit)
|
|
{
|
|
}
|
|
|
|
static inline int iommu_get_msi_cookie(struct iommu_domain *domain, dma_addr_t base)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline void iommu_dma_compose_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
|
|
{
|
|
}
|
|
|
|
#endif /* CONFIG_IOMMU_DMA */
|
|
|
|
/*
|
|
* Newer generations of Tegra SoCs require devices' stream IDs to be directly programmed into
|
|
* some registers. These are always paired with a Tegra SMMU or ARM SMMU, for which the contents
|
|
* of the struct iommu_fwspec are known. Use this helper to formalize access to these internals.
|
|
*/
|
|
#define TEGRA_STREAM_ID_BYPASS 0x7f
|
|
|
|
static inline bool tegra_dev_iommu_get_stream_id(struct device *dev, u32 *stream_id)
|
|
{
|
|
#ifdef CONFIG_IOMMU_API
|
|
struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
|
|
|
|
if (fwspec && fwspec->num_ids == 1) {
|
|
*stream_id = fwspec->ids[0] & 0xffff;
|
|
return true;
|
|
}
|
|
#endif
|
|
|
|
return false;
|
|
}
|
|
|
|
#ifdef CONFIG_IOMMU_SVA
|
|
static inline void mm_pasid_init(struct mm_struct *mm)
|
|
{
|
|
mm->pasid = IOMMU_PASID_INVALID;
|
|
}
|
|
static inline bool mm_valid_pasid(struct mm_struct *mm)
|
|
{
|
|
return mm->pasid != IOMMU_PASID_INVALID;
|
|
}
|
|
void mm_pasid_drop(struct mm_struct *mm);
|
|
struct iommu_sva *iommu_sva_bind_device(struct device *dev,
|
|
struct mm_struct *mm);
|
|
void iommu_sva_unbind_device(struct iommu_sva *handle);
|
|
u32 iommu_sva_get_pasid(struct iommu_sva *handle);
|
|
#else
|
|
static inline struct iommu_sva *
|
|
iommu_sva_bind_device(struct device *dev, struct mm_struct *mm)
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
static inline void iommu_sva_unbind_device(struct iommu_sva *handle)
|
|
{
|
|
}
|
|
|
|
static inline u32 iommu_sva_get_pasid(struct iommu_sva *handle)
|
|
{
|
|
return IOMMU_PASID_INVALID;
|
|
}
|
|
static inline void mm_pasid_init(struct mm_struct *mm) {}
|
|
static inline bool mm_valid_pasid(struct mm_struct *mm) { return false; }
|
|
static inline void mm_pasid_drop(struct mm_struct *mm) {}
|
|
#endif /* CONFIG_IOMMU_SVA */
|
|
|
|
#endif /* __LINUX_IOMMU_H */
|