mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-28 20:02:17 +00:00
![Gabriel Somlo](/assets/img/avatar_default.png)
Since upstream LiteX recommends that Linux support be limited to designs configured with 32-bit CSR subregisters (see commit a2b71fde in upstream LiteX, https://github.com/enjoy-digital/litex), remove the option to select 8-bit subregisters, significantly reducing the complexity of LiteX CSR (MMIO register) accessor methods. NOTE: for details on the underlying mechanics of LiteX CSR registers, see https://github.com/enjoy-digital/litex/wiki/CSR-Bus or the original LiteX accessors (litex/soc/software/include/hw/common.h in the upstream repository). Signed-off-by: Gabriel Somlo <gsomlo@gmail.com> Cc: Stafford Horne <shorne@gmail.com> Cc: Florent Kermarrec <florent@enjoy-digital.fr> Cc: Mateusz Holenko <mholenko@antmicro.com> Cc: Joel Stanley <joel@jms.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stafford Horne <shorne@gmail.com>
83 lines
2.1 KiB
C
83 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* Common LiteX header providing
|
|
* helper functions for accessing CSRs.
|
|
*
|
|
* Copyright (C) 2019-2020 Antmicro <www.antmicro.com>
|
|
*/
|
|
|
|
#ifndef _LINUX_LITEX_H
|
|
#define _LINUX_LITEX_H
|
|
|
|
#include <linux/io.h>
|
|
|
|
static inline void _write_litex_subregister(u32 val, void __iomem *addr)
|
|
{
|
|
writel((u32 __force)cpu_to_le32(val), addr);
|
|
}
|
|
|
|
static inline u32 _read_litex_subregister(void __iomem *addr)
|
|
{
|
|
return le32_to_cpu((__le32 __force)readl(addr));
|
|
}
|
|
|
|
/*
|
|
* LiteX SoC Generator, depending on the configuration, can split a single
|
|
* logical CSR (Control&Status Register) into a series of consecutive physical
|
|
* registers.
|
|
*
|
|
* For example, in the configuration with 8-bit CSR Bus, a 32-bit aligned,
|
|
* 32-bit wide logical CSR will be laid out as four 32-bit physical
|
|
* subregisters, each one containing one byte of meaningful data.
|
|
*
|
|
* For Linux support, upstream LiteX enforces a 32-bit wide CSR bus, which
|
|
* means that only larger-than-32-bit CSRs will be split across multiple
|
|
* subregisters (e.g., a 64-bit CSR will be spread across two consecutive
|
|
* 32-bit subregisters).
|
|
*
|
|
* For details see: https://github.com/enjoy-digital/litex/wiki/CSR-Bus
|
|
*/
|
|
|
|
static inline void litex_write8(void __iomem *reg, u8 val)
|
|
{
|
|
_write_litex_subregister(val, reg);
|
|
}
|
|
|
|
static inline void litex_write16(void __iomem *reg, u16 val)
|
|
{
|
|
_write_litex_subregister(val, reg);
|
|
}
|
|
|
|
static inline void litex_write32(void __iomem *reg, u32 val)
|
|
{
|
|
_write_litex_subregister(val, reg);
|
|
}
|
|
|
|
static inline void litex_write64(void __iomem *reg, u64 val)
|
|
{
|
|
_write_litex_subregister(val >> 32, reg);
|
|
_write_litex_subregister(val, reg + 4);
|
|
}
|
|
|
|
static inline u8 litex_read8(void __iomem *reg)
|
|
{
|
|
return _read_litex_subregister(reg);
|
|
}
|
|
|
|
static inline u16 litex_read16(void __iomem *reg)
|
|
{
|
|
return _read_litex_subregister(reg);
|
|
}
|
|
|
|
static inline u32 litex_read32(void __iomem *reg)
|
|
{
|
|
return _read_litex_subregister(reg);
|
|
}
|
|
|
|
static inline u64 litex_read64(void __iomem *reg)
|
|
{
|
|
return ((u64)_read_litex_subregister(reg) << 32) |
|
|
_read_litex_subregister(reg + 4);
|
|
}
|
|
|
|
#endif /* _LINUX_LITEX_H */
|