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67d6c76fc8
We used to assume 0x2010xxxx address. Now that we need to access 0x2011xxxx address, we need to support read/write the whole 32-bit address space. Also defined RSMU_MAX_WRITE_COUNT and RSMU_MAX_READ_COUNT for readability Signed-off-by: Min Li <min.li.xe@renesas.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/MW5PR03MB693295AF31ABCAF6AE52EE74A08B9@MW5PR03MB6932.namprd03.prod.outlook.com
39 lines
967 B
C
39 lines
967 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Core interface for Renesas Synchronization Management Unit (SMU) devices.
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*
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* Copyright (C) 2021 Integrated Device Technology, Inc., a Renesas Company.
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*/
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#ifndef __LINUX_MFD_RSMU_H
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#define __LINUX_MFD_RSMU_H
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#define RSMU_MAX_WRITE_COUNT (255)
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#define RSMU_MAX_READ_COUNT (255)
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/* The supported devices are ClockMatrix, Sabre and SnowLotus */
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enum rsmu_type {
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RSMU_CM = 0x34000,
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RSMU_SABRE = 0x33810,
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RSMU_SL = 0x19850,
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};
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/**
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*
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* struct rsmu_ddata - device data structure for sub devices.
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*
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* @dev: i2c/spi device.
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* @regmap: i2c/spi bus access.
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* @lock: mutex used by sub devices to make sure a series of
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* bus access requests are not interrupted.
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* @type: RSMU device type.
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* @page: i2c/spi bus driver internal use only.
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*/
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struct rsmu_ddata {
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struct device *dev;
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struct regmap *regmap;
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struct mutex lock;
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enum rsmu_type type;
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u32 page;
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};
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#endif /* __LINUX_MFD_RSMU_H */
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