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RK3568 supports PCIe v3 using not Combphy like PCIe v2 on rk3566. It use a dedicated PCIe-phy. Add support for this. Initial support by Shawn Lin, modifications by Peter Geis and Frank Wunderlich. Add data-lanes property for splitting pcie-lanes across controllers. The data-lanes is an array where x=0 means lane is disabled and x > 0 means controller x is assigned to phy lane. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Suggested-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.kernel.org/r/20220825193836.54262-4-linux@fw-web.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
12 lines
243 B
C
12 lines
243 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*/
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#ifndef __PHY_PCIE_H
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#define __PHY_PCIE_H
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#define PHY_MODE_PCIE_RC 20
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#define PHY_MODE_PCIE_EP 21
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#define PHY_MODE_PCIE_BIFURCATION 22
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#endif
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