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e8b4762c22
The use of DMA_ATTR_SKIP_CPU_SYNC was not consistent across all of the DMA APIs in the arch/arm folder. This change is meant to correct that so that we get consistent behavior. Link: http://lkml.kernel.org/r/20161110113430.76501.79737.stgit@ahduyck-blue-test.jf.intel.com Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Acked-by: Hans-Christian Noren Egtvedt <egtvedt@samfundet.no> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
202 lines
4.9 KiB
C
202 lines
4.9 KiB
C
/*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/dma-mapping.h>
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#include <linux/gfp.h>
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#include <linux/export.h>
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#include <linux/mm.h>
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#include <linux/device.h>
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#include <linux/scatterlist.h>
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#include <asm/processor.h>
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#include <asm/cacheflush.h>
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#include <asm/io.h>
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#include <asm/addrspace.h>
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void dma_cache_sync(struct device *dev, void *vaddr, size_t size, int direction)
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{
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/*
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* No need to sync an uncached area
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*/
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if (PXSEG(vaddr) == P2SEG)
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return;
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switch (direction) {
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case DMA_FROM_DEVICE: /* invalidate only */
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invalidate_dcache_region(vaddr, size);
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break;
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case DMA_TO_DEVICE: /* writeback only */
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clean_dcache_region(vaddr, size);
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break;
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case DMA_BIDIRECTIONAL: /* writeback and invalidate */
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flush_dcache_region(vaddr, size);
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break;
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default:
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BUG();
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}
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}
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EXPORT_SYMBOL(dma_cache_sync);
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static struct page *__dma_alloc(struct device *dev, size_t size,
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dma_addr_t *handle, gfp_t gfp)
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{
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struct page *page, *free, *end;
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int order;
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/* Following is a work-around (a.k.a. hack) to prevent pages
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* with __GFP_COMP being passed to split_page() which cannot
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* handle them. The real problem is that this flag probably
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* should be 0 on AVR32 as it is not supported on this
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* platform--see CONFIG_HUGETLB_PAGE. */
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gfp &= ~(__GFP_COMP);
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size = PAGE_ALIGN(size);
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order = get_order(size);
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page = alloc_pages(gfp, order);
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if (!page)
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return NULL;
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split_page(page, order);
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/*
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* When accessing physical memory with valid cache data, we
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* get a cache hit even if the virtual memory region is marked
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* as uncached.
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*
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* Since the memory is newly allocated, there is no point in
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* doing a writeback. If the previous owner cares, he should
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* have flushed the cache before releasing the memory.
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*/
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invalidate_dcache_region(phys_to_virt(page_to_phys(page)), size);
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*handle = page_to_bus(page);
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free = page + (size >> PAGE_SHIFT);
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end = page + (1 << order);
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/*
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* Free any unused pages
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*/
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while (free < end) {
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__free_page(free);
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free++;
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}
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return page;
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}
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static void __dma_free(struct device *dev, size_t size,
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struct page *page, dma_addr_t handle)
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{
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struct page *end = page + (PAGE_ALIGN(size) >> PAGE_SHIFT);
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while (page < end)
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__free_page(page++);
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}
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static void *avr32_dma_alloc(struct device *dev, size_t size,
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dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
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{
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struct page *page;
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dma_addr_t phys;
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page = __dma_alloc(dev, size, handle, gfp);
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if (!page)
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return NULL;
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phys = page_to_phys(page);
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if (attrs & DMA_ATTR_WRITE_COMBINE) {
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/* Now, map the page into P3 with write-combining turned on */
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*handle = phys;
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return __ioremap(phys, size, _PAGE_BUFFER);
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} else {
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return phys_to_uncached(phys);
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}
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}
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static void avr32_dma_free(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t handle, unsigned long attrs)
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{
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struct page *page;
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if (attrs & DMA_ATTR_WRITE_COMBINE) {
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iounmap(cpu_addr);
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page = phys_to_page(handle);
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} else {
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void *addr = phys_to_cached(uncached_to_phys(cpu_addr));
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pr_debug("avr32_dma_free addr %p (phys %08lx) size %u\n",
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cpu_addr, (unsigned long)handle, (unsigned)size);
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BUG_ON(!virt_addr_valid(addr));
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page = virt_to_page(addr);
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}
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__dma_free(dev, size, page, handle);
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}
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static dma_addr_t avr32_dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction direction, unsigned long attrs)
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{
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void *cpu_addr = page_address(page) + offset;
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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dma_cache_sync(dev, cpu_addr, size, direction);
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return virt_to_bus(cpu_addr);
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}
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static int avr32_dma_map_sg(struct device *dev, struct scatterlist *sglist,
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int nents, enum dma_data_direction direction,
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unsigned long attrs)
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{
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int i;
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struct scatterlist *sg;
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for_each_sg(sglist, sg, nents, i) {
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char *virt;
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sg->dma_address = page_to_bus(sg_page(sg)) + sg->offset;
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virt = sg_virt(sg);
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if (attrs & DMA_ATTR_SKIP_CPU_SYNC)
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continue;
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dma_cache_sync(dev, virt, sg->length, direction);
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}
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return nents;
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}
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static void avr32_dma_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction);
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}
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static void avr32_dma_sync_sg_for_device(struct device *dev,
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struct scatterlist *sglist, int nents,
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enum dma_data_direction direction)
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{
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int i;
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struct scatterlist *sg;
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for_each_sg(sglist, sg, nents, i)
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dma_cache_sync(dev, sg_virt(sg), sg->length, direction);
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}
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struct dma_map_ops avr32_dma_ops = {
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.alloc = avr32_dma_alloc,
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.free = avr32_dma_free,
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.map_page = avr32_dma_map_page,
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.map_sg = avr32_dma_map_sg,
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.sync_single_for_device = avr32_dma_sync_single_for_device,
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.sync_sg_for_device = avr32_dma_sync_sg_for_device,
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};
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EXPORT_SYMBOL(avr32_dma_ops);
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