Palmer Dabbelt 6ae1af9ca0 perf: RISC-V: Add support for SBI PMU and Sscofpmf ... This series improves perf support for RISC-V based system using SBI PMU and Sscofpmf extensions, by adding a new generic RISC-V perf framework along with a pair of drivers: one that usese the new performance-monitoring extensions and one that keeps support for the existing systems that only have the legacy counters. Tested-by: Nikita Shubin <n.shubin@yadro.com> * palmer/riscv-pmu: MAINTAINERS: Add entry for RISC-V PMU drivers Documentation: riscv: Remove the old documentation RISC-V: Add sscofpmf extension support RISC-V: Add perf platform driver based on SBI PMU extension RISC-V: Add RISC-V SBI PMU extension definitions RISC-V: Add a simple platform driver for RISC-V legacy perf RISC-V: Add a perf core library for pmu drivers RISC-V: Add CSR encodings for all HPMCOUNTERS RISC-V: Remove the current perf implementation		2022-03-21 16:07:12 -07:00
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asm	perf: RISC-V: Add support for SBI PMU and Sscofpmf	2022-03-21 16:07:12 -07:00
uapi/asm	ARM:	2021-11-02 11:24:14 -07:00