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6c19787e10
Track whenever an virtual output (crtc) is enabled or disabled. On atomic updates check for both framebuffer being present and crtc being enabled to figure whenever the output is active or not. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Link: http://patchwork.freedesktop.org/patch/msgid/20180813152855.12863-1-kraxel@redhat.com
311 lines
9 KiB
C
311 lines
9 KiB
C
/*
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* Copyright (C) 2015 Red Hat, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "virtgpu_drv.h"
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#include <drm/drm_plane_helper.h>
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#include <drm/drm_atomic_helper.h>
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static const uint32_t virtio_gpu_formats[] = {
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DRM_FORMAT_XRGB8888,
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_BGRX8888,
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DRM_FORMAT_BGRA8888,
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DRM_FORMAT_RGBX8888,
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DRM_FORMAT_RGBA8888,
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DRM_FORMAT_XBGR8888,
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DRM_FORMAT_ABGR8888,
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};
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static const uint32_t virtio_gpu_cursor_formats[] = {
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#ifdef __BIG_ENDIAN
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DRM_FORMAT_BGRA8888,
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#else
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DRM_FORMAT_ARGB8888,
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#endif
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};
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uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc)
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{
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uint32_t format;
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switch (drm_fourcc) {
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#ifdef __BIG_ENDIAN
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case DRM_FORMAT_XRGB8888:
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format = VIRTIO_GPU_FORMAT_X8R8G8B8_UNORM;
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break;
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case DRM_FORMAT_ARGB8888:
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format = VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM;
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break;
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case DRM_FORMAT_BGRX8888:
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format = VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM;
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break;
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case DRM_FORMAT_BGRA8888:
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format = VIRTIO_GPU_FORMAT_B8G8R8A8_UNORM;
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break;
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case DRM_FORMAT_RGBX8888:
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format = VIRTIO_GPU_FORMAT_R8G8B8X8_UNORM;
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break;
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case DRM_FORMAT_RGBA8888:
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format = VIRTIO_GPU_FORMAT_R8G8B8A8_UNORM;
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break;
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case DRM_FORMAT_XBGR8888:
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format = VIRTIO_GPU_FORMAT_X8B8G8R8_UNORM;
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break;
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case DRM_FORMAT_ABGR8888:
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format = VIRTIO_GPU_FORMAT_A8B8G8R8_UNORM;
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break;
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#else
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case DRM_FORMAT_XRGB8888:
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format = VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM;
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break;
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case DRM_FORMAT_ARGB8888:
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format = VIRTIO_GPU_FORMAT_B8G8R8A8_UNORM;
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break;
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case DRM_FORMAT_BGRX8888:
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format = VIRTIO_GPU_FORMAT_X8R8G8B8_UNORM;
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break;
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case DRM_FORMAT_BGRA8888:
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format = VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM;
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break;
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case DRM_FORMAT_RGBX8888:
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format = VIRTIO_GPU_FORMAT_X8B8G8R8_UNORM;
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break;
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case DRM_FORMAT_RGBA8888:
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format = VIRTIO_GPU_FORMAT_A8B8G8R8_UNORM;
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break;
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case DRM_FORMAT_XBGR8888:
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format = VIRTIO_GPU_FORMAT_R8G8B8X8_UNORM;
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break;
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case DRM_FORMAT_ABGR8888:
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format = VIRTIO_GPU_FORMAT_R8G8B8A8_UNORM;
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break;
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#endif
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default:
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/*
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* This should not happen, we handle everything listed
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* in virtio_gpu_formats[].
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*/
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format = 0;
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break;
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}
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WARN_ON(format == 0);
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return format;
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}
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static void virtio_gpu_plane_destroy(struct drm_plane *plane)
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{
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drm_plane_cleanup(plane);
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kfree(plane);
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}
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static const struct drm_plane_funcs virtio_gpu_plane_funcs = {
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.update_plane = drm_atomic_helper_update_plane,
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.disable_plane = drm_atomic_helper_disable_plane,
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.destroy = virtio_gpu_plane_destroy,
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.reset = drm_atomic_helper_plane_reset,
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.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
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};
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static int virtio_gpu_plane_atomic_check(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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return 0;
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}
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static void virtio_gpu_primary_plane_update(struct drm_plane *plane,
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struct drm_plane_state *old_state)
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{
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struct drm_device *dev = plane->dev;
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struct virtio_gpu_device *vgdev = dev->dev_private;
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struct virtio_gpu_output *output = NULL;
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struct virtio_gpu_framebuffer *vgfb;
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struct virtio_gpu_object *bo;
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uint32_t handle;
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if (plane->state->crtc)
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output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);
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if (old_state->crtc)
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output = drm_crtc_to_virtio_gpu_output(old_state->crtc);
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if (WARN_ON(!output))
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return;
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if (plane->state->fb && output->enabled) {
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vgfb = to_virtio_gpu_framebuffer(plane->state->fb);
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bo = gem_to_virtio_gpu_obj(vgfb->base.obj[0]);
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handle = bo->hw_res_handle;
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if (bo->dumb) {
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virtio_gpu_cmd_transfer_to_host_2d
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(vgdev, handle, 0,
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cpu_to_le32(plane->state->src_w >> 16),
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cpu_to_le32(plane->state->src_h >> 16),
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cpu_to_le32(plane->state->src_x >> 16),
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cpu_to_le32(plane->state->src_y >> 16), NULL);
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}
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} else {
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handle = 0;
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}
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DRM_DEBUG("handle 0x%x, crtc %dx%d+%d+%d, src %dx%d+%d+%d\n", handle,
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plane->state->crtc_w, plane->state->crtc_h,
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plane->state->crtc_x, plane->state->crtc_y,
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plane->state->src_w >> 16,
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plane->state->src_h >> 16,
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plane->state->src_x >> 16,
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plane->state->src_y >> 16);
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virtio_gpu_cmd_set_scanout(vgdev, output->index, handle,
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plane->state->src_w >> 16,
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plane->state->src_h >> 16,
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plane->state->src_x >> 16,
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plane->state->src_y >> 16);
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virtio_gpu_cmd_resource_flush(vgdev, handle,
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plane->state->src_x >> 16,
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plane->state->src_y >> 16,
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plane->state->src_w >> 16,
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plane->state->src_h >> 16);
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}
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static void virtio_gpu_cursor_plane_update(struct drm_plane *plane,
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struct drm_plane_state *old_state)
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{
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struct drm_device *dev = plane->dev;
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struct virtio_gpu_device *vgdev = dev->dev_private;
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struct virtio_gpu_output *output = NULL;
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struct virtio_gpu_framebuffer *vgfb;
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struct virtio_gpu_fence *fence = NULL;
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struct virtio_gpu_object *bo = NULL;
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uint32_t handle;
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int ret = 0;
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if (plane->state->crtc)
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output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);
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if (old_state->crtc)
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output = drm_crtc_to_virtio_gpu_output(old_state->crtc);
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if (WARN_ON(!output))
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return;
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if (plane->state->fb) {
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vgfb = to_virtio_gpu_framebuffer(plane->state->fb);
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bo = gem_to_virtio_gpu_obj(vgfb->base.obj[0]);
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handle = bo->hw_res_handle;
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} else {
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handle = 0;
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}
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if (bo && bo->dumb && (plane->state->fb != old_state->fb)) {
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/* new cursor -- update & wait */
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virtio_gpu_cmd_transfer_to_host_2d
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(vgdev, handle, 0,
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cpu_to_le32(plane->state->crtc_w),
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cpu_to_le32(plane->state->crtc_h),
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0, 0, &fence);
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ret = virtio_gpu_object_reserve(bo, false);
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if (!ret) {
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reservation_object_add_excl_fence(bo->tbo.resv,
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&fence->f);
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dma_fence_put(&fence->f);
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fence = NULL;
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virtio_gpu_object_unreserve(bo);
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virtio_gpu_object_wait(bo, false);
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}
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}
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if (plane->state->fb != old_state->fb) {
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DRM_DEBUG("update, handle %d, pos +%d+%d, hot %d,%d\n", handle,
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plane->state->crtc_x,
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plane->state->crtc_y,
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plane->state->fb ? plane->state->fb->hot_x : 0,
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plane->state->fb ? plane->state->fb->hot_y : 0);
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output->cursor.hdr.type =
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cpu_to_le32(VIRTIO_GPU_CMD_UPDATE_CURSOR);
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output->cursor.resource_id = cpu_to_le32(handle);
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if (plane->state->fb) {
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output->cursor.hot_x =
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cpu_to_le32(plane->state->fb->hot_x);
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output->cursor.hot_y =
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cpu_to_le32(plane->state->fb->hot_y);
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} else {
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output->cursor.hot_x = cpu_to_le32(0);
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output->cursor.hot_y = cpu_to_le32(0);
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}
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} else {
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DRM_DEBUG("move +%d+%d\n",
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plane->state->crtc_x,
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plane->state->crtc_y);
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output->cursor.hdr.type =
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cpu_to_le32(VIRTIO_GPU_CMD_MOVE_CURSOR);
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}
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output->cursor.pos.x = cpu_to_le32(plane->state->crtc_x);
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output->cursor.pos.y = cpu_to_le32(plane->state->crtc_y);
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virtio_gpu_cursor_ping(vgdev, output);
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}
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static const struct drm_plane_helper_funcs virtio_gpu_primary_helper_funcs = {
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.atomic_check = virtio_gpu_plane_atomic_check,
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.atomic_update = virtio_gpu_primary_plane_update,
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};
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static const struct drm_plane_helper_funcs virtio_gpu_cursor_helper_funcs = {
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.atomic_check = virtio_gpu_plane_atomic_check,
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.atomic_update = virtio_gpu_cursor_plane_update,
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};
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struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
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enum drm_plane_type type,
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int index)
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{
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struct drm_device *dev = vgdev->ddev;
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const struct drm_plane_helper_funcs *funcs;
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struct drm_plane *plane;
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const uint32_t *formats;
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int ret, nformats;
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plane = kzalloc(sizeof(*plane), GFP_KERNEL);
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if (!plane)
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return ERR_PTR(-ENOMEM);
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if (type == DRM_PLANE_TYPE_CURSOR) {
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formats = virtio_gpu_cursor_formats;
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nformats = ARRAY_SIZE(virtio_gpu_cursor_formats);
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funcs = &virtio_gpu_cursor_helper_funcs;
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} else {
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formats = virtio_gpu_formats;
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nformats = ARRAY_SIZE(virtio_gpu_formats);
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funcs = &virtio_gpu_primary_helper_funcs;
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}
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ret = drm_universal_plane_init(dev, plane, 1 << index,
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&virtio_gpu_plane_funcs,
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formats, nformats,
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NULL, type, NULL);
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if (ret)
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goto err_plane_init;
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drm_plane_helper_add(plane, funcs);
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return plane;
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err_plane_init:
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kfree(plane);
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return ERR_PTR(ret);
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}
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