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![Mika Westerberg](/assets/img/avatar_default.png)
Add support for Intel Low Power I/O subsystem PWM controllers found on Intel BayTrail SoC. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Chew, Kean Ho <kean.ho.chew@intel.com> Signed-off-by: Chang, Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
183 lines
4.4 KiB
C
183 lines
4.4 KiB
C
/*
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* Intel Low Power Subsystem PWM controller driver
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*
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* Copyright (C) 2014, Intel Corporation
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* Author: Mika Westerberg <mika.westerberg@linux.intel.com>
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* Author: Chew Kean Ho <kean.ho.chew@intel.com>
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* Author: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
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* Author: Chew Chiau Ee <chiau.ee.chew@intel.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/acpi.h>
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pwm.h>
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#include <linux/platform_device.h>
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#define PWM 0x00000000
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#define PWM_ENABLE BIT(31)
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#define PWM_SW_UPDATE BIT(30)
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#define PWM_BASE_UNIT_SHIFT 8
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#define PWM_BASE_UNIT_MASK 0x00ffff00
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#define PWM_ON_TIME_DIV_MASK 0x000000ff
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#define PWM_DIVISION_CORRECTION 0x2
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#define PWM_LIMIT (0x8000 + PWM_DIVISION_CORRECTION)
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#define NSECS_PER_SEC 1000000000UL
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struct pwm_lpss_chip {
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struct pwm_chip chip;
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void __iomem *regs;
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struct clk *clk;
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};
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static inline struct pwm_lpss_chip *to_lpwm(struct pwm_chip *chip)
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{
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return container_of(chip, struct pwm_lpss_chip, chip);
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}
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static int pwm_lpss_config(struct pwm_chip *chip, struct pwm_device *pwm,
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int duty_ns, int period_ns)
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{
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struct pwm_lpss_chip *lpwm = to_lpwm(chip);
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u8 on_time_div;
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unsigned long c;
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unsigned long long base_unit, freq = NSECS_PER_SEC;
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u32 ctrl;
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do_div(freq, period_ns);
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/* The equation is: base_unit = ((freq / c) * 65536) + correction */
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base_unit = freq * 65536;
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c = clk_get_rate(lpwm->clk);
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if (!c)
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return -EINVAL;
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do_div(base_unit, c);
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base_unit += PWM_DIVISION_CORRECTION;
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if (base_unit > PWM_LIMIT)
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return -EINVAL;
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if (duty_ns <= 0)
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duty_ns = 1;
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on_time_div = 255 - (255 * duty_ns / period_ns);
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ctrl = readl(lpwm->regs + PWM);
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ctrl &= ~(PWM_BASE_UNIT_MASK | PWM_ON_TIME_DIV_MASK);
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ctrl |= (u16) base_unit << PWM_BASE_UNIT_SHIFT;
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ctrl |= on_time_div;
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/* request PWM to update on next cycle */
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ctrl |= PWM_SW_UPDATE;
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writel(ctrl, lpwm->regs + PWM);
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return 0;
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}
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static int pwm_lpss_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct pwm_lpss_chip *lpwm = to_lpwm(chip);
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u32 ctrl;
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int ret;
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ret = clk_prepare_enable(lpwm->clk);
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if (ret)
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return ret;
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ctrl = readl(lpwm->regs + PWM);
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writel(ctrl | PWM_ENABLE, lpwm->regs + PWM);
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return 0;
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}
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static void pwm_lpss_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct pwm_lpss_chip *lpwm = to_lpwm(chip);
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u32 ctrl;
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ctrl = readl(lpwm->regs + PWM);
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writel(ctrl & ~PWM_ENABLE, lpwm->regs + PWM);
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clk_disable_unprepare(lpwm->clk);
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}
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static const struct pwm_ops pwm_lpss_ops = {
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.config = pwm_lpss_config,
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.enable = pwm_lpss_enable,
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.disable = pwm_lpss_disable,
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.owner = THIS_MODULE,
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};
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static const struct acpi_device_id pwm_lpss_acpi_match[] = {
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{ "80860F09", 0 },
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{ },
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};
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MODULE_DEVICE_TABLE(acpi, pwm_lpss_acpi_match);
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static int pwm_lpss_probe(struct platform_device *pdev)
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{
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struct pwm_lpss_chip *lpwm;
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struct resource *r;
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int ret;
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lpwm = devm_kzalloc(&pdev->dev, sizeof(*lpwm), GFP_KERNEL);
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if (!lpwm)
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return -ENOMEM;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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lpwm->regs = devm_ioremap_resource(&pdev->dev, r);
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if (IS_ERR(lpwm->regs))
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return PTR_ERR(lpwm->regs);
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lpwm->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(lpwm->clk)) {
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dev_err(&pdev->dev, "failed to get PWM clock\n");
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return PTR_ERR(lpwm->clk);
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}
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lpwm->chip.dev = &pdev->dev;
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lpwm->chip.ops = &pwm_lpss_ops;
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lpwm->chip.base = -1;
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lpwm->chip.npwm = 1;
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ret = pwmchip_add(&lpwm->chip);
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if (ret) {
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dev_err(&pdev->dev, "failed to add PWM chip: %d\n", ret);
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return ret;
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}
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platform_set_drvdata(pdev, lpwm);
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return 0;
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}
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static int pwm_lpss_remove(struct platform_device *pdev)
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{
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struct pwm_lpss_chip *lpwm = platform_get_drvdata(pdev);
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u32 ctrl;
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ctrl = readl(lpwm->regs + PWM);
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writel(ctrl & ~PWM_ENABLE, lpwm->regs + PWM);
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return pwmchip_remove(&lpwm->chip);
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}
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static struct platform_driver pwm_lpss_driver = {
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.driver = {
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.name = "pwm-lpss",
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.acpi_match_table = pwm_lpss_acpi_match,
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},
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.probe = pwm_lpss_probe,
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.remove = pwm_lpss_remove,
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};
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module_platform_driver(pwm_lpss_driver);
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MODULE_DESCRIPTION("PWM driver for Intel LPSS");
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MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:pwm-lpss");
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