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![Suresh Siddha](/assets/img/avatar_default.png)
Wolfgang Walter reported this oops on his via C3 using padlock for AES-encryption: ################################################################## BUG: unable to handle kernel NULL pointer dereference at 000001f0 IP: [<c01028c5>] __switch_to+0x30/0x117 *pde = 00000000 Oops: 0002 [#1] PREEMPT Modules linked in: Pid: 2071, comm: sleep Not tainted (2.6.26 #11) EIP: 0060:[<c01028c5>] EFLAGS: 00010002 CPU: 0 EIP is at __switch_to+0x30/0x117 EAX: 00000000 EBX: c0493300 ECX: dc48dd00 EDX: c0493300 ESI: dc48dd00 EDI: c0493530 EBP: c04cff8c ESP: c04cff7c DS: 007b ES: 007b FS: 0000 GS: 0033 SS: 0068 Process sleep (pid: 2071, ti=c04ce000 task=dc48dd00 task.ti=d2fe6000) Stack: dc48df30 c0493300 00000000 00000000 d2fe7f44 c03b5b43 c04cffc8 00000046 c0131856 0000005a dc472d3c c0493300 c0493470 d983ae00 00002696 00000000 c0239f54 00000000 c04c4000 c04cffd8 c01025fe c04f3740 00049800 c04cffe0 Call Trace: [<c03b5b43>] ? schedule+0x285/0x2ff [<c0131856>] ? pm_qos_requirement+0x3c/0x53 [<c0239f54>] ? acpi_processor_idle+0x0/0x434 [<c01025fe>] ? cpu_idle+0x73/0x7f [<c03a4dcd>] ? rest_init+0x61/0x63 ======================= Wolfgang also found out that adding kernel_fpu_begin() and kernel_fpu_end() around the padlock instructions fix the oops. Suresh wrote: These padlock instructions though don't use/touch SSE registers, but it behaves similar to other SSE instructions. For example, it might cause DNA faults when cr0.ts is set. While this is a spurious DNA trap, it might cause oops with the recent fpu code changes. This is the code sequence that is probably causing this problem: a) new app is getting exec'd and it is somewhere in between start_thread() and flush_old_exec() in the load_xyz_binary() b) At pont "a", task's fpu state (like TS_USEDFPU, used_math() etc) is cleared. c) Now we get an interrupt/softirq which starts using these encrypt/decrypt routines in the network stack. This generates a math fault (as cr0.ts is '1') which sets TS_USEDFPU and restores the math that is in the task's xstate. d) Return to exec code path, which does start_thread() which does free_thread_xstate() and sets xstate pointer to NULL while the TS_USEDFPU is still set. e) At the next context switch from the new exec'd task to another task, we have a scenarios where TS_USEDFPU is set but xstate pointer is null. This can cause an oops during unlazy_fpu() in __switch_to() Now: 1) This should happen with or with out pre-emption. Viro also encountered similar problem with out CONFIG_PREEMPT. 2) kernel_fpu_begin() and kernel_fpu_end() will fix this problem, because kernel_fpu_begin() will manually do a clts() and won't run in to the situation of setting TS_USEDFPU in step "c" above. 3) This was working before the fpu changes, because its a spurious math fault which doesn't corrupt any fpu/sse registers and the task's math state was always in an allocated state. With out the recent lazy fpu allocation changes, while we don't see oops, there is a possible race still present in older kernels(for example, while kernel is using kernel_fpu_begin() in some optimized clear/copy page and an interrupt/softirq happens which uses these padlock instructions generating DNA fault). This is the failing scenario that existed even before the lazy fpu allocation changes: 0. CPU's TS flag is set 1. kernel using FPU in some optimized copy routine and while doing kernel_fpu_begin() takes an interrupt just before doing clts() 2. Takes an interrupt and ipsec uses padlock instruction. And we take a DNA fault as TS flag is still set. 3. We handle the DNA fault and set TS_USEDFPU and clear cr0.ts 4. We complete the padlock routine 5. Go back to step-1, which resumes clts() in kernel_fpu_begin(), finishes the optimized copy routine and does kernel_fpu_end(). At this point, we have cr0.ts again set to '1' but the task's TS_USEFPU is stilll set and not cleared. 6. Now kernel resumes its user operation. And at the next context switch, kernel sees it has do a FP save as TS_USEDFPU is still set and then will do a unlazy_fpu() in __switch_to(). unlazy_fpu() will take a DNA fault, as cr0.ts is '1' and now, because we are in __switch_to(), math_state_restore() will get confused and will restore the next task's FP state and will save it in prev tasks's FP state. Remember, in __switch_to() we are already on the stack of the next task but take a DNA fault for the prev task. This causes the fpu leakage. Fix the padlock instruction usage by calling them inside the context of new routines irq_ts_save/restore(), which clear/restore cr0.ts manually in the interrupt context. This will not generate spurious DNA in the context of the interrupt which will fix the oops encountered and the possible FPU leakage issue. Reported-and-bisected-by: Wolfgang Walter <wolfgang.walter@stwm.de> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
310 lines
7.8 KiB
C
310 lines
7.8 KiB
C
/*
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* Cryptographic API.
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*
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* Support for VIA PadLock hardware crypto engine.
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*
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* Copyright (c) 2006 Michal Ludvig <michal@logix.cz>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#include <crypto/algapi.h>
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#include <crypto/sha.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/cryptohash.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/scatterlist.h>
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#include <asm/i387.h>
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#include "padlock.h"
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#define SHA1_DEFAULT_FALLBACK "sha1-generic"
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#define SHA256_DEFAULT_FALLBACK "sha256-generic"
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struct padlock_sha_ctx {
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char *data;
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size_t used;
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int bypass;
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void (*f_sha_padlock)(const char *in, char *out, int count);
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struct hash_desc fallback;
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};
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static inline struct padlock_sha_ctx *ctx(struct crypto_tfm *tfm)
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{
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return crypto_tfm_ctx(tfm);
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}
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/* We'll need aligned address on the stack */
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#define NEAREST_ALIGNED(ptr) \
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((void *)ALIGN((size_t)(ptr), PADLOCK_ALIGNMENT))
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static struct crypto_alg sha1_alg, sha256_alg;
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static void padlock_sha_bypass(struct crypto_tfm *tfm)
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{
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if (ctx(tfm)->bypass)
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return;
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crypto_hash_init(&ctx(tfm)->fallback);
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if (ctx(tfm)->data && ctx(tfm)->used) {
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struct scatterlist sg;
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sg_init_one(&sg, ctx(tfm)->data, ctx(tfm)->used);
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crypto_hash_update(&ctx(tfm)->fallback, &sg, sg.length);
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}
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ctx(tfm)->used = 0;
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ctx(tfm)->bypass = 1;
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}
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static void padlock_sha_init(struct crypto_tfm *tfm)
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{
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ctx(tfm)->used = 0;
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ctx(tfm)->bypass = 0;
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}
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static void padlock_sha_update(struct crypto_tfm *tfm,
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const uint8_t *data, unsigned int length)
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{
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/* Our buffer is always one page. */
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if (unlikely(!ctx(tfm)->bypass &&
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(ctx(tfm)->used + length > PAGE_SIZE)))
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padlock_sha_bypass(tfm);
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if (unlikely(ctx(tfm)->bypass)) {
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struct scatterlist sg;
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sg_init_one(&sg, (uint8_t *)data, length);
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crypto_hash_update(&ctx(tfm)->fallback, &sg, length);
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return;
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}
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memcpy(ctx(tfm)->data + ctx(tfm)->used, data, length);
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ctx(tfm)->used += length;
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}
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static inline void padlock_output_block(uint32_t *src,
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uint32_t *dst, size_t count)
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{
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while (count--)
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*dst++ = swab32(*src++);
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}
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static void padlock_do_sha1(const char *in, char *out, int count)
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{
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/* We can't store directly to *out as it may be unaligned. */
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/* BTW Don't reduce the buffer size below 128 Bytes!
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* PadLock microcode needs it that big. */
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char buf[128+16];
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char *result = NEAREST_ALIGNED(buf);
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int ts_state;
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((uint32_t *)result)[0] = SHA1_H0;
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((uint32_t *)result)[1] = SHA1_H1;
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((uint32_t *)result)[2] = SHA1_H2;
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((uint32_t *)result)[3] = SHA1_H3;
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((uint32_t *)result)[4] = SHA1_H4;
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/* prevent taking the spurious DNA fault with padlock. */
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ts_state = irq_ts_save();
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asm volatile (".byte 0xf3,0x0f,0xa6,0xc8" /* rep xsha1 */
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: "+S"(in), "+D"(result)
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: "c"(count), "a"(0));
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irq_ts_restore(ts_state);
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padlock_output_block((uint32_t *)result, (uint32_t *)out, 5);
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}
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static void padlock_do_sha256(const char *in, char *out, int count)
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{
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/* We can't store directly to *out as it may be unaligned. */
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/* BTW Don't reduce the buffer size below 128 Bytes!
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* PadLock microcode needs it that big. */
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char buf[128+16];
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char *result = NEAREST_ALIGNED(buf);
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int ts_state;
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((uint32_t *)result)[0] = SHA256_H0;
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((uint32_t *)result)[1] = SHA256_H1;
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((uint32_t *)result)[2] = SHA256_H2;
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((uint32_t *)result)[3] = SHA256_H3;
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((uint32_t *)result)[4] = SHA256_H4;
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((uint32_t *)result)[5] = SHA256_H5;
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((uint32_t *)result)[6] = SHA256_H6;
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((uint32_t *)result)[7] = SHA256_H7;
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/* prevent taking the spurious DNA fault with padlock. */
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ts_state = irq_ts_save();
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asm volatile (".byte 0xf3,0x0f,0xa6,0xd0" /* rep xsha256 */
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: "+S"(in), "+D"(result)
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: "c"(count), "a"(0));
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irq_ts_restore(ts_state);
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padlock_output_block((uint32_t *)result, (uint32_t *)out, 8);
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}
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static void padlock_sha_final(struct crypto_tfm *tfm, uint8_t *out)
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{
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if (unlikely(ctx(tfm)->bypass)) {
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crypto_hash_final(&ctx(tfm)->fallback, out);
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ctx(tfm)->bypass = 0;
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return;
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}
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/* Pass the input buffer to PadLock microcode... */
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ctx(tfm)->f_sha_padlock(ctx(tfm)->data, out, ctx(tfm)->used);
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ctx(tfm)->used = 0;
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}
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static int padlock_cra_init(struct crypto_tfm *tfm)
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{
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const char *fallback_driver_name = tfm->__crt_alg->cra_name;
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struct crypto_hash *fallback_tfm;
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/* For now we'll allocate one page. This
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* could eventually be configurable one day. */
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ctx(tfm)->data = (char *)__get_free_page(GFP_KERNEL);
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if (!ctx(tfm)->data)
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return -ENOMEM;
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/* Allocate a fallback and abort if it failed. */
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fallback_tfm = crypto_alloc_hash(fallback_driver_name, 0,
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CRYPTO_ALG_ASYNC |
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CRYPTO_ALG_NEED_FALLBACK);
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if (IS_ERR(fallback_tfm)) {
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printk(KERN_WARNING PFX "Fallback driver '%s' could not be loaded!\n",
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fallback_driver_name);
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free_page((unsigned long)(ctx(tfm)->data));
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return PTR_ERR(fallback_tfm);
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}
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ctx(tfm)->fallback.tfm = fallback_tfm;
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return 0;
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}
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static int padlock_sha1_cra_init(struct crypto_tfm *tfm)
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{
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ctx(tfm)->f_sha_padlock = padlock_do_sha1;
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return padlock_cra_init(tfm);
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}
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static int padlock_sha256_cra_init(struct crypto_tfm *tfm)
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{
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ctx(tfm)->f_sha_padlock = padlock_do_sha256;
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return padlock_cra_init(tfm);
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}
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static void padlock_cra_exit(struct crypto_tfm *tfm)
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{
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if (ctx(tfm)->data) {
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free_page((unsigned long)(ctx(tfm)->data));
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ctx(tfm)->data = NULL;
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}
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crypto_free_hash(ctx(tfm)->fallback.tfm);
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ctx(tfm)->fallback.tfm = NULL;
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}
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static struct crypto_alg sha1_alg = {
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.cra_name = "sha1",
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.cra_driver_name = "sha1-padlock",
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.cra_priority = PADLOCK_CRA_PRIORITY,
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.cra_flags = CRYPTO_ALG_TYPE_DIGEST |
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CRYPTO_ALG_NEED_FALLBACK,
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.cra_blocksize = SHA1_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct padlock_sha_ctx),
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.cra_module = THIS_MODULE,
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.cra_list = LIST_HEAD_INIT(sha1_alg.cra_list),
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.cra_init = padlock_sha1_cra_init,
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.cra_exit = padlock_cra_exit,
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.cra_u = {
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.digest = {
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.dia_digestsize = SHA1_DIGEST_SIZE,
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.dia_init = padlock_sha_init,
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.dia_update = padlock_sha_update,
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.dia_final = padlock_sha_final,
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}
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}
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};
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static struct crypto_alg sha256_alg = {
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.cra_name = "sha256",
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.cra_driver_name = "sha256-padlock",
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.cra_priority = PADLOCK_CRA_PRIORITY,
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.cra_flags = CRYPTO_ALG_TYPE_DIGEST |
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CRYPTO_ALG_NEED_FALLBACK,
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.cra_blocksize = SHA256_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct padlock_sha_ctx),
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.cra_module = THIS_MODULE,
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.cra_list = LIST_HEAD_INIT(sha256_alg.cra_list),
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.cra_init = padlock_sha256_cra_init,
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.cra_exit = padlock_cra_exit,
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.cra_u = {
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.digest = {
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.dia_digestsize = SHA256_DIGEST_SIZE,
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.dia_init = padlock_sha_init,
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.dia_update = padlock_sha_update,
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.dia_final = padlock_sha_final,
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}
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}
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};
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static int __init padlock_init(void)
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{
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int rc = -ENODEV;
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if (!cpu_has_phe) {
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printk(KERN_NOTICE PFX "VIA PadLock Hash Engine not detected.\n");
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return -ENODEV;
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}
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if (!cpu_has_phe_enabled) {
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printk(KERN_NOTICE PFX "VIA PadLock detected, but not enabled. Hmm, strange...\n");
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return -ENODEV;
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}
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rc = crypto_register_alg(&sha1_alg);
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if (rc)
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goto out;
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rc = crypto_register_alg(&sha256_alg);
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if (rc)
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goto out_unreg1;
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printk(KERN_NOTICE PFX "Using VIA PadLock ACE for SHA1/SHA256 algorithms.\n");
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return 0;
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out_unreg1:
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crypto_unregister_alg(&sha1_alg);
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out:
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printk(KERN_ERR PFX "VIA PadLock SHA1/SHA256 initialization failed.\n");
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return rc;
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}
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static void __exit padlock_fini(void)
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{
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crypto_unregister_alg(&sha1_alg);
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crypto_unregister_alg(&sha256_alg);
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}
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module_init(padlock_init);
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module_exit(padlock_fini);
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MODULE_DESCRIPTION("VIA PadLock SHA1/SHA256 algorithms support.");
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Michal Ludvig");
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MODULE_ALIAS("sha1");
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MODULE_ALIAS("sha256");
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MODULE_ALIAS("sha1-padlock");
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MODULE_ALIAS("sha256-padlock");
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