Linus Torvalds eb67d239f3 RISC-V Patches for the 6.2 Merge Window, Part 1 ... * Support for the T-Head PMU via the perf subsystem. * ftrace support for rv32. * Support for non-volatile memory devices. * Various fixes and cleanups. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmOZ6WsTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYiWGcD/wLGiHq3ekQhl5D+CaA1WlJ5XzQFfY2 bv1ZCZGdjuiv66jiMlmEsbpfUCk3bSAIjCO3MHQNDmTuPJztCHVJXOHbZFWItzzO soW4nXHKW1sGHa7hDLGQUPkltA48OdPoyqEDvlnpyEWFT+2xHwdFEURWE85FXGeq ZzFSKUQqX/V52n9TS4M4QtmNnQatR3TgIs8ttzD4JqwWFBbp4/iBfIGt6n3W24XH 9lKWikO4YOYUPl0KVIakM4d8NmX7g+7vhCKWavLke1fF/IQOlyWwA0eM8ryj33OG L1nFkqfF3mCw9i72WHftlc0rAgVqcYS8ntnQkPNpt2zPp3xFjDwEy+XiZrRE+sAp m5Ma2Tkw7G3ueBtXwP1yo+EKa7PrVFbCRD/rEpLJAC6+9ktvc7cYs39E08O+wrwT qkYThDolovqMOqfOq6afEGy5lfIa5U00vxK+3MXiE3eLEjHSJhwTXadUbwyMjJWE zOwA6p5NfDFzklESSNTtIBY85Zlh/g2q6GWCy7yBQnlaSdbpDxcnAlSZipq66Iqm 9ytdZiHid4BIRQxr5qyXTB184BvFnWNRs9NGhCj38uLEnuxwSChzwoh/WPDxLNte U9ouvwJO5U2qAZsMGJhY8W2s/9WvWpSqRhSMA/nnNV1Hh+URFz8rFXAln6kNn//v j+cYGCyjLnO1hg== =4Ak2 -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.2-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Palmer Dabbelt: - Support for the T-Head PMU via the perf subsystem - ftrace support for rv32 - Support for non-volatile memory devices - Various fixes and cleanups * tag 'riscv-for-linus-6.2-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (52 commits) Documentation: RISC-V: patch-acceptance: s/implementor/implementer Documentation: RISC-V: Mention the UEFI Standards Documentation: RISC-V: Allow patches for non-standard behavior Documentation: RISC-V: Fix a typo in patch-acceptance riscv: Fixup compile error with !MMU riscv: Fix P4D_SHIFT definition for 3-level page table mode riscv: Apply a static assert to riscv_isa_ext_id RISC-V: Add some comments about the shadow and overflow stacks RISC-V: Align the shadow stack RISC-V: Ensure Zicbom has a valid block size RISC-V: Introduce riscv_isa_extension_check RISC-V: Improve use of isa2hwcap[] riscv: Don't duplicate _ALTERNATIVE_CFG* macros riscv: alternatives: Drop the underscores from the assembly macro names riscv: alternatives: Don't name unused macro parameters riscv: Don't duplicate __ALTERNATIVE_CFG in __ALTERNATIVE_CFG_2 riscv: mm: call best_map_size many times during linear-mapping riscv: Move cast inside kernel_mapping_[pv]a_to_[vp]a riscv: Fix crash during early errata patching riscv: boot: add zstd support ...		2022-12-14 15:23:49 -08:00
..
amlogic	perf/amlogic: Remove unused header inclusions of <linux/version.h>	2022-11-29 13:32:16 +00:00
arm_cspmu	perf: arm_cspmu: Fix module cyclic dependency	2022-11-18 13:32:11 +00:00
hisilicon	drivers/perf: hisi: Add TLP filter support	2022-11-29 14:30:55 +00:00
alibaba_uncore_drw_pmu.c
apple_m1_cpu_pmu.c
arm-cci.c
arm-ccn.c
arm-cmn.c
arm_dmc620_pmu.c	perf/arm_dmc620: Fix hotplug callback leak in dmc620_pmu_init()	2022-11-15 13:47:04 +00:00
arm_dsu_pmu.c	perf: arm_dsu: Fix hotplug callback leak in dsu_pmu_init()	2022-11-15 13:45:01 +00:00
arm_pmu.c	Perf events updates for v6.2:	2022-12-12 15:19:38 -08:00
arm_pmu_acpi.c	arm_pmu: acpi: handle allocation failure	2022-11-08 12:42:46 +00:00
arm_pmu_platform.c
arm_smmuv3_pmu.c	perf/smmuv3: Fix hotplug callback leak in arm_smmu_pmu_init()	2022-11-15 13:47:04 +00:00
arm_spe_pmu.c	Perf events updates for v6.1:	2022-10-10 09:27:46 -07:00
fsl_imx8_ddr_perf.c
Kconfig	Updates for the interrupt core and driver subsystem:	2022-12-12 11:21:29 -08:00
Makefile	perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver	2022-11-21 18:28:45 +00:00
marvell_cn10k_ddr_pmu.c
marvell_cn10k_tad_pmu.c	drivers: perf: marvell_cn10k: Fix hotplug callback leak in tad_pmu_init()	2022-11-15 13:45:02 +00:00
qcom_l2_pmu.c
qcom_l3_pmu.c
riscv_pmu.c
riscv_pmu_legacy.c
riscv_pmu_sbi.c	drivers/perf: riscv_pmu_sbi: add support for PMU variant on T-Head C9xx cores	2022-10-27 14:35:20 -07:00
thunderx2_pmu.c
xgene_pmu.c