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![Martin Jerabek](/assets/img/avatar_default.png)
This driver adds support for the CTU CAN FD open-source IP core. More documentation and core sources at project page (https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core). The core integration to Xilinx Zynq system as platform driver is available (https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top). Implementation on Intel FPGA based PCI Express board is available from project (https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd). More about CAN bus related projects used and developed at CTU FEE at https://canbus.pages.fel.cvut.cz/ . Link: https://lore.kernel.org/all/1906e4941560ae2ce4b8d181131fd4963aa31611.1647904780.git.pisa@cmp.felk.cvut.cz Signed-off-by: Martin Jerabek <martin.jerabek01@gmail.com> Signed-off-by: Ondrej Ille <ondrej.ille@gmail.com> Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
82 lines
2.5 KiB
C
82 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*******************************************************************************
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*
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* CTU CAN FD IP Core
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*
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* Copyright (C) 2015-2018 Ondrej Ille <ondrej.ille@gmail.com> FEE CTU
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* Copyright (C) 2018-2021 Ondrej Ille <ondrej.ille@gmail.com> self-funded
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* Copyright (C) 2018-2019 Martin Jerabek <martin.jerabek01@gmail.com> FEE CTU
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* Copyright (C) 2018-2021 Pavel Pisa <pisa@cmp.felk.cvut.cz> FEE CTU/self-funded
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*
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* Project advisors:
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* Jiri Novak <jnovak@fel.cvut.cz>
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* Pavel Pisa <pisa@cmp.felk.cvut.cz>
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*
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* Department of Measurement (http://meas.fel.cvut.cz/)
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* Faculty of Electrical Engineering (http://www.fel.cvut.cz)
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* Czech Technical University (http://www.cvut.cz/)
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******************************************************************************/
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#ifndef __CTUCANFD__
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#define __CTUCANFD__
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#include <linux/netdevice.h>
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#include <linux/can/dev.h>
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#include <linux/list.h>
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enum ctu_can_fd_can_registers;
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struct ctucan_priv {
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struct can_priv can; /* must be first member! */
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void __iomem *mem_base;
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u32 (*read_reg)(struct ctucan_priv *priv,
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enum ctu_can_fd_can_registers reg);
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void (*write_reg)(struct ctucan_priv *priv,
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enum ctu_can_fd_can_registers reg, u32 val);
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unsigned int txb_head;
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unsigned int txb_tail;
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u32 txb_prio;
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unsigned int ntxbufs;
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spinlock_t tx_lock; /* spinlock to serialize allocation and processing of TX buffers */
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struct napi_struct napi;
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struct device *dev;
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struct clk *can_clk;
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int irq_flags;
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unsigned long drv_flags;
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u32 rxfrm_first_word;
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struct list_head peers_on_pdev;
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};
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/**
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* ctucan_probe_common - Device type independent registration call
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*
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* This function does all the memory allocation and registration for the CAN
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* device.
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*
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* @dev: Handle to the generic device structure
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* @addr: Base address of CTU CAN FD core address
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* @irq: Interrupt number
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* @ntxbufs: Number of implemented Tx buffers
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* @can_clk_rate: Clock rate, if 0 then clock are taken from device node
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* @pm_enable_call: Whether pm_runtime_enable should be called
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* @set_drvdata_fnc: Function to set network driver data for physical device
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*
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* Return: 0 on success and failure value on error
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*/
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int ctucan_probe_common(struct device *dev, void __iomem *addr,
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int irq, unsigned int ntxbufs,
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unsigned long can_clk_rate,
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int pm_enable_call,
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void (*set_drvdata_fnc)(struct device *dev,
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struct net_device *ndev));
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int ctucan_suspend(struct device *dev) __maybe_unused;
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int ctucan_resume(struct device *dev) __maybe_unused;
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#endif /*__CTUCANFD__*/
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