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![Kumar Gala](/assets/img/avatar_default.png)
The registers that describe size supported by TLB are different on MMU v2 as well as we support power of two page sizes. For now we continue to assume that FSL variable size array supports all page sizes up to the maximum one reported in TLB1PS. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
244 lines
6.5 KiB
C
244 lines
6.5 KiB
C
/*
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* Modifications by Kumar Gala (galak@kernel.crashing.org) to support
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* E500 Book E processors.
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*
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* Copyright 2004,2010 Freescale Semiconductor, Inc.
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*
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* This file contains the routines for initializing the MMU
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* on the 4xx series of chips.
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* -- paulus
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*
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* Derived from arch/ppc/mm/init.c:
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
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* and Cort Dougan (PReP) (cort@cs.nmt.edu)
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* Copyright (C) 1996 Paul Mackerras
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*
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* Derived from "arch/i386/mm/init.c"
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/ptrace.h>
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#include <linux/mman.h>
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#include <linux/mm.h>
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#include <linux/swap.h>
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#include <linux/stddef.h>
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#include <linux/vmalloc.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/highmem.h>
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#include <linux/memblock.h>
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#include <asm/pgalloc.h>
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#include <asm/prom.h>
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#include <asm/io.h>
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#include <asm/mmu_context.h>
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#include <asm/pgtable.h>
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#include <asm/mmu.h>
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#include <asm/uaccess.h>
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#include <asm/smp.h>
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#include <asm/machdep.h>
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#include <asm/setup.h>
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#include "mmu_decl.h"
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unsigned int tlbcam_index;
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#define NUM_TLBCAMS (64)
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struct tlbcam TLBCAM[NUM_TLBCAMS];
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struct tlbcamrange {
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unsigned long start;
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unsigned long limit;
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phys_addr_t phys;
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} tlbcam_addrs[NUM_TLBCAMS];
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extern unsigned int tlbcam_index;
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unsigned long tlbcam_sz(int idx)
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{
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return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1;
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}
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/*
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* Return PA for this VA if it is mapped by a CAM, or 0
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*/
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phys_addr_t v_mapped_by_tlbcam(unsigned long va)
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{
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int b;
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for (b = 0; b < tlbcam_index; ++b)
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if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
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return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
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return 0;
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}
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/*
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* Return VA for a given PA or 0 if not mapped
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*/
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unsigned long p_mapped_by_tlbcam(phys_addr_t pa)
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{
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int b;
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for (b = 0; b < tlbcam_index; ++b)
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if (pa >= tlbcam_addrs[b].phys
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&& pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
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+tlbcam_addrs[b].phys)
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return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
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return 0;
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}
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/*
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* Set up a variable-size TLB entry (tlbcam). The parameters are not checked;
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* in particular size must be a power of 4 between 4k and the max supported by
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* an implementation; max may further be limited by what can be represented in
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* an unsigned long (for example, 32-bit implementations cannot support a 4GB
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* size).
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*/
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static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
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unsigned long size, unsigned long flags, unsigned int pid)
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{
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unsigned int tsize;
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tsize = __ilog2(size) - 10;
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#ifdef CONFIG_SMP
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if ((flags & _PAGE_NO_CACHE) == 0)
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flags |= _PAGE_COHERENT;
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#endif
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TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
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TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
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TLBCAM[index].MAS2 = virt & PAGE_MASK;
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TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
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TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
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TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
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TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
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TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
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TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SX | MAS3_SR;
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TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
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if (mmu_has_feature(MMU_FTR_BIG_PHYS))
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TLBCAM[index].MAS7 = (u64)phys >> 32;
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/* Below is unlikely -- only for large user pages or similar */
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if (pte_user(flags)) {
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TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
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TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
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}
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tlbcam_addrs[index].start = virt;
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tlbcam_addrs[index].limit = virt + size - 1;
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tlbcam_addrs[index].phys = phys;
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loadcam_entry(index);
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}
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unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
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phys_addr_t phys)
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{
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unsigned int camsize = __ilog2(ram);
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unsigned int align = __ffs(virt | phys);
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unsigned long max_cam;
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if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) {
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/* Convert (4^max) kB to (2^max) bytes */
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max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10;
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camsize &= ~1U;
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align &= ~1U;
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} else {
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/* Convert (2^max) kB to (2^max) bytes */
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max_cam = __ilog2(mfspr(SPRN_TLB1PS)) + 10;
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}
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if (camsize > align)
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camsize = align;
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if (camsize > max_cam)
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camsize = max_cam;
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return 1UL << camsize;
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}
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unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx)
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{
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int i;
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unsigned long virt = PAGE_OFFSET;
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phys_addr_t phys = memstart_addr;
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unsigned long amount_mapped = 0;
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/* Calculate CAM values */
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for (i = 0; ram && i < max_cam_idx; i++) {
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unsigned long cam_sz;
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cam_sz = calc_cam_sz(ram, virt, phys);
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settlbcam(i, virt, phys, cam_sz, PAGE_KERNEL_X, 0);
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ram -= cam_sz;
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amount_mapped += cam_sz;
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virt += cam_sz;
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phys += cam_sz;
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}
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tlbcam_index = i;
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return amount_mapped;
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}
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#ifdef CONFIG_PPC32
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#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
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#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
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#endif
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unsigned long __init mmu_mapin_ram(unsigned long top)
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{
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return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
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}
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/*
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* MMU_init_hw does the chip-specific initialization of the MMU hardware.
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*/
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void __init MMU_init_hw(void)
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{
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flush_instruction_cache();
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}
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void __init adjust_total_lowmem(void)
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{
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unsigned long ram;
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int i;
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/* adjust lowmem size to __max_low_memory */
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ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
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__max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM);
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pr_info("Memory CAM mapping: ");
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for (i = 0; i < tlbcam_index - 1; i++)
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pr_cont("%lu/", tlbcam_sz(i) >> 20);
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pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20,
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(unsigned int)((total_lowmem - __max_low_memory) >> 20));
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memblock_set_current_limit(memstart_addr + __max_low_memory);
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}
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void setup_initial_memory_limit(phys_addr_t first_memblock_base,
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phys_addr_t first_memblock_size)
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{
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phys_addr_t limit = first_memblock_base + first_memblock_size;
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/* 64M mapped initially according to head_fsl_booke.S */
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memblock_set_current_limit(min_t(u64, limit, 0x04000000));
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}
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#endif
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