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RISCV_NONSTANDARD_CACHE_OPS is also used for the pmem cache maintenance helpers, which are built into the kernel unconditionally. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20231018052654.50074-2-hch@lst.de Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
11 lines
278 B
Text
11 lines
278 B
Text
# SPDX-License-Identifier: GPL-2.0
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menu "Cache Drivers"
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config AX45MP_L2_CACHE
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bool "Andes Technology AX45MP L2 Cache controller"
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depends on RISCV
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select RISCV_NONSTANDARD_CACHE_OPS
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help
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Support for the L2 cache controller on Andes Technology AX45MP platforms.
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endmenu
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