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a1867f85e0
Add support for ClockMatrix(TM) and 82P33xxx families of timing and synchronization devices. The access interface can be either SPI or I2C. Currently, it will create 2 types of MFD devices, which are to be used by the corresponding rsmu character device driver and the PTP hardware clock driver, respectively. Signed-off-by: Min Li <min.li.xe@renesas.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
88 lines
1.6 KiB
C
88 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Core driver for Renesas Synchronization Management Unit (SMU) devices.
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*
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* Copyright (C) 2021 Integrated Device Technology, Inc., a Renesas Company.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/rsmu.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include "rsmu.h"
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enum {
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RSMU_PHC = 0,
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RSMU_CDEV = 1,
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RSMU_N_DEVS = 2,
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};
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static struct mfd_cell rsmu_cm_devs[] = {
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[RSMU_PHC] = {
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.name = "8a3400x-phc",
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},
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[RSMU_CDEV] = {
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.name = "8a3400x-cdev",
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},
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};
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static struct mfd_cell rsmu_sabre_devs[] = {
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[RSMU_PHC] = {
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.name = "82p33x1x-phc",
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},
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[RSMU_CDEV] = {
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.name = "82p33x1x-cdev",
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},
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};
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static struct mfd_cell rsmu_sl_devs[] = {
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[RSMU_PHC] = {
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.name = "8v19n85x-phc",
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},
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[RSMU_CDEV] = {
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.name = "8v19n85x-cdev",
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},
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};
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int rsmu_core_init(struct rsmu_ddata *rsmu)
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{
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struct mfd_cell *cells;
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int ret;
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switch (rsmu->type) {
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case RSMU_CM:
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cells = rsmu_cm_devs;
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break;
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case RSMU_SABRE:
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cells = rsmu_sabre_devs;
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break;
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case RSMU_SL:
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cells = rsmu_sl_devs;
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break;
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default:
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dev_err(rsmu->dev, "Unsupported RSMU device type: %d\n", rsmu->type);
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return -ENODEV;
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}
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mutex_init(&rsmu->lock);
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ret = devm_mfd_add_devices(rsmu->dev, PLATFORM_DEVID_AUTO, cells,
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RSMU_N_DEVS, NULL, 0, NULL);
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if (ret < 0)
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dev_err(rsmu->dev, "Failed to register sub-devices: %d\n", ret);
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return ret;
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}
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void rsmu_core_exit(struct rsmu_ddata *rsmu)
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{
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mutex_destroy(&rsmu->lock);
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}
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MODULE_DESCRIPTION("Renesas SMU core driver");
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MODULE_LICENSE("GPL");
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