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c92e7ef164
Add a clocksource based on the goldfish-rtc device. Move the timer register definition to <clocksource/timer-goldfish.h> This kernel implementation is based on the QEMU upstream implementation: https://git.qemu.org/?p=qemu.git;a=blob_plain;f=hw/rtc/goldfish_rtc.c goldfish-timer is a high-precision signed 64-bit nanosecond timer. It is part of the 'goldfish' virtual hardware platform used to run some emulated Android systems under QEMU. This timer only supports oneshot event. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20220406201523.243733-4-laurent@vivier.eu Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
206 lines
4.6 KiB
C
206 lines
4.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* drivers/rtc/rtc-goldfish.c
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*
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* Copyright (C) 2007 Google, Inc.
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* Copyright (C) 2017 Imagination Technologies Ltd.
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*/
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/rtc.h>
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#include <linux/goldfish.h>
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#include <clocksource/timer-goldfish.h>
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struct goldfish_rtc {
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void __iomem *base;
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int irq;
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struct rtc_device *rtc;
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};
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static int goldfish_rtc_read_alarm(struct device *dev,
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struct rtc_wkalrm *alrm)
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{
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u64 rtc_alarm;
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u64 rtc_alarm_low;
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u64 rtc_alarm_high;
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void __iomem *base;
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struct goldfish_rtc *rtcdrv;
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rtcdrv = dev_get_drvdata(dev);
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base = rtcdrv->base;
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rtc_alarm_low = gf_ioread32(base + TIMER_ALARM_LOW);
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rtc_alarm_high = gf_ioread32(base + TIMER_ALARM_HIGH);
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rtc_alarm = (rtc_alarm_high << 32) | rtc_alarm_low;
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do_div(rtc_alarm, NSEC_PER_SEC);
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memset(alrm, 0, sizeof(struct rtc_wkalrm));
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rtc_time64_to_tm(rtc_alarm, &alrm->time);
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if (gf_ioread32(base + TIMER_ALARM_STATUS))
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alrm->enabled = 1;
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else
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alrm->enabled = 0;
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return 0;
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}
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static int goldfish_rtc_set_alarm(struct device *dev,
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struct rtc_wkalrm *alrm)
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{
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struct goldfish_rtc *rtcdrv;
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u64 rtc_alarm64;
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u64 rtc_status_reg;
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void __iomem *base;
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rtcdrv = dev_get_drvdata(dev);
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base = rtcdrv->base;
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if (alrm->enabled) {
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rtc_alarm64 = rtc_tm_to_time64(&alrm->time) * NSEC_PER_SEC;
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gf_iowrite32((rtc_alarm64 >> 32), base + TIMER_ALARM_HIGH);
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gf_iowrite32(rtc_alarm64, base + TIMER_ALARM_LOW);
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gf_iowrite32(1, base + TIMER_IRQ_ENABLED);
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} else {
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/*
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* if this function was called with enabled=0
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* then it could mean that the application is
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* trying to cancel an ongoing alarm
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*/
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rtc_status_reg = gf_ioread32(base + TIMER_ALARM_STATUS);
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if (rtc_status_reg)
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gf_iowrite32(1, base + TIMER_CLEAR_ALARM);
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}
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return 0;
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}
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static int goldfish_rtc_alarm_irq_enable(struct device *dev,
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unsigned int enabled)
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{
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void __iomem *base;
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struct goldfish_rtc *rtcdrv;
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rtcdrv = dev_get_drvdata(dev);
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base = rtcdrv->base;
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if (enabled)
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gf_iowrite32(1, base + TIMER_IRQ_ENABLED);
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else
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gf_iowrite32(0, base + TIMER_IRQ_ENABLED);
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return 0;
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}
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static irqreturn_t goldfish_rtc_interrupt(int irq, void *dev_id)
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{
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struct goldfish_rtc *rtcdrv = dev_id;
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void __iomem *base = rtcdrv->base;
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gf_iowrite32(1, base + TIMER_CLEAR_INTERRUPT);
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rtc_update_irq(rtcdrv->rtc, 1, RTC_IRQF | RTC_AF);
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return IRQ_HANDLED;
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}
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static int goldfish_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct goldfish_rtc *rtcdrv;
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void __iomem *base;
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u64 time_high;
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u64 time_low;
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u64 time;
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rtcdrv = dev_get_drvdata(dev);
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base = rtcdrv->base;
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time_low = gf_ioread32(base + TIMER_TIME_LOW);
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time_high = gf_ioread32(base + TIMER_TIME_HIGH);
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time = (time_high << 32) | time_low;
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do_div(time, NSEC_PER_SEC);
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rtc_time64_to_tm(time, tm);
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return 0;
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}
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static int goldfish_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct goldfish_rtc *rtcdrv;
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void __iomem *base;
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u64 now64;
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rtcdrv = dev_get_drvdata(dev);
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base = rtcdrv->base;
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now64 = rtc_tm_to_time64(tm) * NSEC_PER_SEC;
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gf_iowrite32((now64 >> 32), base + TIMER_TIME_HIGH);
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gf_iowrite32(now64, base + TIMER_TIME_LOW);
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return 0;
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}
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static const struct rtc_class_ops goldfish_rtc_ops = {
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.read_time = goldfish_rtc_read_time,
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.set_time = goldfish_rtc_set_time,
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.read_alarm = goldfish_rtc_read_alarm,
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.set_alarm = goldfish_rtc_set_alarm,
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.alarm_irq_enable = goldfish_rtc_alarm_irq_enable
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};
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static int goldfish_rtc_probe(struct platform_device *pdev)
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{
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struct goldfish_rtc *rtcdrv;
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int err;
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rtcdrv = devm_kzalloc(&pdev->dev, sizeof(*rtcdrv), GFP_KERNEL);
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if (!rtcdrv)
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return -ENOMEM;
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platform_set_drvdata(pdev, rtcdrv);
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rtcdrv->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(rtcdrv->base))
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return PTR_ERR(rtcdrv->base);
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rtcdrv->irq = platform_get_irq(pdev, 0);
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if (rtcdrv->irq < 0)
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return -ENODEV;
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rtcdrv->rtc = devm_rtc_allocate_device(&pdev->dev);
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if (IS_ERR(rtcdrv->rtc))
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return PTR_ERR(rtcdrv->rtc);
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rtcdrv->rtc->ops = &goldfish_rtc_ops;
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rtcdrv->rtc->range_max = U64_MAX / NSEC_PER_SEC;
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err = devm_request_irq(&pdev->dev, rtcdrv->irq,
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goldfish_rtc_interrupt,
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0, pdev->name, rtcdrv);
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if (err)
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return err;
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return devm_rtc_register_device(rtcdrv->rtc);
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}
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static const struct of_device_id goldfish_rtc_of_match[] = {
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{ .compatible = "google,goldfish-rtc", },
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{},
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};
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MODULE_DEVICE_TABLE(of, goldfish_rtc_of_match);
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static struct platform_driver goldfish_rtc = {
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.probe = goldfish_rtc_probe,
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.driver = {
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.name = "goldfish_rtc",
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.of_match_table = goldfish_rtc_of_match,
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}
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};
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module_platform_driver(goldfish_rtc);
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MODULE_LICENSE("GPL v2");
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