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![Ville Syrjälä](/assets/img/avatar_default.png)
Add an extra remapping step between the logical state of the LUTs (hw.(de)gamma_lut) as specified via uapi/bigjoiner copy vs. the actual state of the LUTs programmed into the hardware. With this we should be finally able finish the (de)gamma readout/state checker support for the remaining platforms (ilk-skl) where the same hardware LUT can be positioned either before or after the pipe CSC unit. Where we position it depends on factors such as presence of the logical degamma LUT, RGB vs. YCbCr output, full vs. limited RGB quantization range. Without the extra remapping step the state readout doesn't really know whether the LUT read from the hardware is the degamma or gamma LUT, and so we is unable to accurately store it into our crtc state. With the remapping step we know exactly where to put it given the order of the LUT vs. CSC in the hardware state. Only the initial hw->uapi state readout done during driver load/resume still has the problem of not really knowing what to do with the LUT(s). But we can just assume 1:1 mapping there and let subsequent commits fix things up. Another benefit is that we now have a place for purely internal LUTs, without complicating the bigjoiner uapi->hw copy logic. This should prove useful for streamlining glk degamma LUT handling. Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221024161514.5340-3-ville.syrjala@linux.intel.com
550 lines
17 KiB
C
550 lines
17 KiB
C
/*
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* Copyright © 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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/**
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* DOC: atomic modeset support
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*
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* The functions here implement the state management and hardware programming
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* dispatch required by the atomic modeset infrastructure.
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* See intel_atomic_plane.c for the plane-specific atomic functionality.
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*/
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_fourcc.h>
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#include "i915_drv.h"
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#include "i915_reg.h"
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#include "intel_atomic.h"
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#include "intel_cdclk.h"
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#include "intel_display_types.h"
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#include "intel_global_state.h"
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#include "intel_hdcp.h"
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#include "intel_psr.h"
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#include "skl_universal_plane.h"
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/**
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* intel_digital_connector_atomic_get_property - hook for connector->atomic_get_property.
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* @connector: Connector to get the property for.
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* @state: Connector state to retrieve the property from.
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* @property: Property to retrieve.
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* @val: Return value for the property.
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*
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* Returns the atomic property value for a digital connector.
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*/
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int intel_digital_connector_atomic_get_property(struct drm_connector *connector,
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const struct drm_connector_state *state,
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struct drm_property *property,
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u64 *val)
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{
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struct drm_device *dev = connector->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct intel_digital_connector_state *intel_conn_state =
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to_intel_digital_connector_state(state);
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if (property == dev_priv->display.properties.force_audio)
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*val = intel_conn_state->force_audio;
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else if (property == dev_priv->display.properties.broadcast_rgb)
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*val = intel_conn_state->broadcast_rgb;
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else {
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drm_dbg_atomic(&dev_priv->drm,
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"Unknown property [PROP:%d:%s]\n",
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property->base.id, property->name);
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return -EINVAL;
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}
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return 0;
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}
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/**
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* intel_digital_connector_atomic_set_property - hook for connector->atomic_set_property.
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* @connector: Connector to set the property for.
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* @state: Connector state to set the property on.
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* @property: Property to set.
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* @val: New value for the property.
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*
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* Sets the atomic property value for a digital connector.
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*/
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int intel_digital_connector_atomic_set_property(struct drm_connector *connector,
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struct drm_connector_state *state,
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struct drm_property *property,
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u64 val)
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{
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struct drm_device *dev = connector->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct intel_digital_connector_state *intel_conn_state =
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to_intel_digital_connector_state(state);
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if (property == dev_priv->display.properties.force_audio) {
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intel_conn_state->force_audio = val;
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return 0;
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}
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if (property == dev_priv->display.properties.broadcast_rgb) {
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intel_conn_state->broadcast_rgb = val;
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return 0;
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}
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drm_dbg_atomic(&dev_priv->drm, "Unknown property [PROP:%d:%s]\n",
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property->base.id, property->name);
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return -EINVAL;
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}
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int intel_digital_connector_atomic_check(struct drm_connector *conn,
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struct drm_atomic_state *state)
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{
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struct drm_connector_state *new_state =
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drm_atomic_get_new_connector_state(state, conn);
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struct intel_digital_connector_state *new_conn_state =
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to_intel_digital_connector_state(new_state);
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struct drm_connector_state *old_state =
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drm_atomic_get_old_connector_state(state, conn);
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struct intel_digital_connector_state *old_conn_state =
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to_intel_digital_connector_state(old_state);
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struct drm_crtc_state *crtc_state;
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intel_hdcp_atomic_check(conn, old_state, new_state);
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if (!new_state->crtc)
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return 0;
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crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);
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/*
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* These properties are handled by fastset, and might not end
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* up in a modeset.
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*/
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if (new_conn_state->force_audio != old_conn_state->force_audio ||
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new_conn_state->broadcast_rgb != old_conn_state->broadcast_rgb ||
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new_conn_state->base.colorspace != old_conn_state->base.colorspace ||
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new_conn_state->base.picture_aspect_ratio != old_conn_state->base.picture_aspect_ratio ||
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new_conn_state->base.content_type != old_conn_state->base.content_type ||
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new_conn_state->base.scaling_mode != old_conn_state->base.scaling_mode ||
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new_conn_state->base.privacy_screen_sw_state != old_conn_state->base.privacy_screen_sw_state ||
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!drm_connector_atomic_hdr_metadata_equal(old_state, new_state))
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crtc_state->mode_changed = true;
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return 0;
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}
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/**
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* intel_digital_connector_duplicate_state - duplicate connector state
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* @connector: digital connector
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*
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* Allocates and returns a copy of the connector state (both common and
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* digital connector specific) for the specified connector.
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*
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* Returns: The newly allocated connector state, or NULL on failure.
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*/
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struct drm_connector_state *
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intel_digital_connector_duplicate_state(struct drm_connector *connector)
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{
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struct intel_digital_connector_state *state;
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state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
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if (!state)
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return NULL;
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__drm_atomic_helper_connector_duplicate_state(connector, &state->base);
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return &state->base;
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}
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/**
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* intel_connector_needs_modeset - check if connector needs a modeset
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* @state: the atomic state corresponding to this modeset
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* @connector: the connector
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*/
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bool
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intel_connector_needs_modeset(struct intel_atomic_state *state,
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struct drm_connector *connector)
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{
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const struct drm_connector_state *old_conn_state, *new_conn_state;
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old_conn_state = drm_atomic_get_old_connector_state(&state->base, connector);
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new_conn_state = drm_atomic_get_new_connector_state(&state->base, connector);
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return old_conn_state->crtc != new_conn_state->crtc ||
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(new_conn_state->crtc &&
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drm_atomic_crtc_needs_modeset(drm_atomic_get_new_crtc_state(&state->base,
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new_conn_state->crtc)));
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}
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/**
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* intel_any_crtc_needs_modeset - check if any CRTC needs a modeset
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* @state: the atomic state corresponding to this modeset
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*
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* Returns true if any CRTC in @state needs a modeset.
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*/
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bool intel_any_crtc_needs_modeset(struct intel_atomic_state *state)
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{
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struct intel_crtc *crtc;
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struct intel_crtc_state *crtc_state;
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int i;
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for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
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if (intel_crtc_needs_modeset(crtc_state))
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return true;
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}
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return false;
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}
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struct intel_digital_connector_state *
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intel_atomic_get_digital_connector_state(struct intel_atomic_state *state,
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struct intel_connector *connector)
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{
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struct drm_connector_state *conn_state;
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conn_state = drm_atomic_get_connector_state(&state->base,
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&connector->base);
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if (IS_ERR(conn_state))
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return ERR_CAST(conn_state);
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return to_intel_digital_connector_state(conn_state);
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}
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/**
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* intel_crtc_duplicate_state - duplicate crtc state
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* @crtc: drm crtc
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*
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* Allocates and returns a copy of the crtc state (both common and
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* Intel-specific) for the specified crtc.
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*
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* Returns: The newly allocated crtc state, or NULL on failure.
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*/
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struct drm_crtc_state *
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intel_crtc_duplicate_state(struct drm_crtc *crtc)
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{
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const struct intel_crtc_state *old_crtc_state = to_intel_crtc_state(crtc->state);
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struct intel_crtc_state *crtc_state;
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crtc_state = kmemdup(old_crtc_state, sizeof(*crtc_state), GFP_KERNEL);
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if (!crtc_state)
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return NULL;
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__drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->uapi);
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/* copy color blobs */
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if (crtc_state->hw.degamma_lut)
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drm_property_blob_get(crtc_state->hw.degamma_lut);
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if (crtc_state->hw.ctm)
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drm_property_blob_get(crtc_state->hw.ctm);
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if (crtc_state->hw.gamma_lut)
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drm_property_blob_get(crtc_state->hw.gamma_lut);
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if (crtc_state->pre_csc_lut)
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drm_property_blob_get(crtc_state->pre_csc_lut);
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if (crtc_state->post_csc_lut)
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drm_property_blob_get(crtc_state->post_csc_lut);
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crtc_state->update_pipe = false;
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crtc_state->disable_lp_wm = false;
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crtc_state->disable_cxsr = false;
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crtc_state->update_wm_pre = false;
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crtc_state->update_wm_post = false;
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crtc_state->fifo_changed = false;
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crtc_state->preload_luts = false;
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crtc_state->inherited = false;
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crtc_state->wm.need_postvbl_update = false;
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crtc_state->do_async_flip = false;
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crtc_state->fb_bits = 0;
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crtc_state->update_planes = 0;
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crtc_state->dsb = NULL;
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return &crtc_state->uapi;
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}
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static void intel_crtc_put_color_blobs(struct intel_crtc_state *crtc_state)
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{
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drm_property_blob_put(crtc_state->hw.degamma_lut);
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drm_property_blob_put(crtc_state->hw.gamma_lut);
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drm_property_blob_put(crtc_state->hw.ctm);
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drm_property_blob_put(crtc_state->pre_csc_lut);
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drm_property_blob_put(crtc_state->post_csc_lut);
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}
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void intel_crtc_free_hw_state(struct intel_crtc_state *crtc_state)
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{
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intel_crtc_put_color_blobs(crtc_state);
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}
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/**
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* intel_crtc_destroy_state - destroy crtc state
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* @crtc: drm crtc
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* @state: the state to destroy
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*
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* Destroys the crtc state (both common and Intel-specific) for the
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* specified crtc.
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*/
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void
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intel_crtc_destroy_state(struct drm_crtc *crtc,
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struct drm_crtc_state *state)
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{
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struct intel_crtc_state *crtc_state = to_intel_crtc_state(state);
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drm_WARN_ON(crtc->dev, crtc_state->dsb);
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__drm_atomic_helper_crtc_destroy_state(&crtc_state->uapi);
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intel_crtc_free_hw_state(crtc_state);
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kfree(crtc_state);
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}
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static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_state,
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int num_scalers_need, struct intel_crtc *intel_crtc,
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const char *name, int idx,
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struct intel_plane_state *plane_state,
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int *scaler_id)
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{
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struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
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int j;
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u32 mode;
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if (*scaler_id < 0) {
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/* find a free scaler */
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for (j = 0; j < intel_crtc->num_scalers; j++) {
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if (scaler_state->scalers[j].in_use)
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continue;
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*scaler_id = j;
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scaler_state->scalers[*scaler_id].in_use = 1;
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break;
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}
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}
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if (drm_WARN(&dev_priv->drm, *scaler_id < 0,
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"Cannot find scaler for %s:%d\n", name, idx))
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return;
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/* set scaler mode */
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if (plane_state && plane_state->hw.fb &&
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plane_state->hw.fb->format->is_yuv &&
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plane_state->hw.fb->format->num_planes > 1) {
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struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
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if (DISPLAY_VER(dev_priv) == 9) {
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mode = SKL_PS_SCALER_MODE_NV12;
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} else if (icl_is_hdr_plane(dev_priv, plane->id)) {
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/*
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* On gen11+'s HDR planes we only use the scaler for
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* scaling. They have a dedicated chroma upsampler, so
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* we don't need the scaler to upsample the UV plane.
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*/
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mode = PS_SCALER_MODE_NORMAL;
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} else {
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struct intel_plane *linked =
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plane_state->planar_linked_plane;
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mode = PS_SCALER_MODE_PLANAR;
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if (linked)
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mode |= PS_PLANE_Y_SEL(linked->id);
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}
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} else if (DISPLAY_VER(dev_priv) >= 10) {
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mode = PS_SCALER_MODE_NORMAL;
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} else if (num_scalers_need == 1 && intel_crtc->num_scalers > 1) {
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/*
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* when only 1 scaler is in use on a pipe with 2 scalers
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* scaler 0 operates in high quality (HQ) mode.
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* In this case use scaler 0 to take advantage of HQ mode
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*/
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scaler_state->scalers[*scaler_id].in_use = 0;
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*scaler_id = 0;
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scaler_state->scalers[0].in_use = 1;
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mode = SKL_PS_SCALER_MODE_HQ;
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} else {
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mode = SKL_PS_SCALER_MODE_DYN;
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}
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drm_dbg_kms(&dev_priv->drm, "Attached scaler id %u.%u to %s:%d\n",
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intel_crtc->pipe, *scaler_id, name, idx);
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scaler_state->scalers[*scaler_id].mode = mode;
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}
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/**
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* intel_atomic_setup_scalers() - setup scalers for crtc per staged requests
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* @dev_priv: i915 device
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* @intel_crtc: intel crtc
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* @crtc_state: incoming crtc_state to validate and setup scalers
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*
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* This function sets up scalers based on staged scaling requests for
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* a @crtc and its planes. It is called from crtc level check path. If request
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* is a supportable request, it attaches scalers to requested planes and crtc.
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*
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* This function takes into account the current scaler(s) in use by any planes
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* not being part of this atomic state
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*
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* Returns:
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* 0 - scalers were setup succesfully
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* error code - otherwise
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*/
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int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
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struct intel_crtc *intel_crtc,
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struct intel_crtc_state *crtc_state)
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{
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struct drm_plane *plane = NULL;
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struct intel_plane *intel_plane;
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struct intel_plane_state *plane_state = NULL;
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struct intel_crtc_scaler_state *scaler_state =
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&crtc_state->scaler_state;
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struct drm_atomic_state *drm_state = crtc_state->uapi.state;
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struct intel_atomic_state *intel_state = to_intel_atomic_state(drm_state);
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int num_scalers_need;
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int i;
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num_scalers_need = hweight32(scaler_state->scaler_users);
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/*
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* High level flow:
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* - staged scaler requests are already in scaler_state->scaler_users
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* - check whether staged scaling requests can be supported
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* - add planes using scalers that aren't in current transaction
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* - assign scalers to requested users
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* - as part of plane commit, scalers will be committed
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* (i.e., either attached or detached) to respective planes in hw
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* - as part of crtc_commit, scaler will be either attached or detached
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* to crtc in hw
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*/
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/* fail if required scalers > available scalers */
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if (num_scalers_need > intel_crtc->num_scalers){
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drm_dbg_kms(&dev_priv->drm,
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"Too many scaling requests %d > %d\n",
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num_scalers_need, intel_crtc->num_scalers);
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return -EINVAL;
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}
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/* walkthrough scaler_users bits and start assigning scalers */
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for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) {
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int *scaler_id;
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const char *name;
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int idx;
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/* skip if scaler not required */
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if (!(scaler_state->scaler_users & (1 << i)))
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continue;
|
|
|
|
if (i == SKL_CRTC_INDEX) {
|
|
name = "CRTC";
|
|
idx = intel_crtc->base.base.id;
|
|
|
|
/* panel fitter case: assign as a crtc scaler */
|
|
scaler_id = &scaler_state->scaler_id;
|
|
} else {
|
|
name = "PLANE";
|
|
|
|
/* plane scaler case: assign as a plane scaler */
|
|
/* find the plane that set the bit as scaler_user */
|
|
plane = drm_state->planes[i].ptr;
|
|
|
|
/*
|
|
* to enable/disable hq mode, add planes that are using scaler
|
|
* into this transaction
|
|
*/
|
|
if (!plane) {
|
|
struct drm_plane_state *state;
|
|
|
|
/*
|
|
* GLK+ scalers don't have a HQ mode so it
|
|
* isn't necessary to change between HQ and dyn mode
|
|
* on those platforms.
|
|
*/
|
|
if (DISPLAY_VER(dev_priv) >= 10)
|
|
continue;
|
|
|
|
plane = drm_plane_from_index(&dev_priv->drm, i);
|
|
state = drm_atomic_get_plane_state(drm_state, plane);
|
|
if (IS_ERR(state)) {
|
|
drm_dbg_kms(&dev_priv->drm,
|
|
"Failed to add [PLANE:%d] to drm_state\n",
|
|
plane->base.id);
|
|
return PTR_ERR(state);
|
|
}
|
|
}
|
|
|
|
intel_plane = to_intel_plane(plane);
|
|
idx = plane->base.id;
|
|
|
|
/* plane on different crtc cannot be a scaler user of this crtc */
|
|
if (drm_WARN_ON(&dev_priv->drm,
|
|
intel_plane->pipe != intel_crtc->pipe))
|
|
continue;
|
|
|
|
plane_state = intel_atomic_get_new_plane_state(intel_state,
|
|
intel_plane);
|
|
scaler_id = &plane_state->scaler_id;
|
|
}
|
|
|
|
intel_atomic_setup_scaler(scaler_state, num_scalers_need,
|
|
intel_crtc, name, idx,
|
|
plane_state, scaler_id);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
struct drm_atomic_state *
|
|
intel_atomic_state_alloc(struct drm_device *dev)
|
|
{
|
|
struct intel_atomic_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
|
|
|
|
if (!state || drm_atomic_state_init(dev, &state->base) < 0) {
|
|
kfree(state);
|
|
return NULL;
|
|
}
|
|
|
|
return &state->base;
|
|
}
|
|
|
|
void intel_atomic_state_free(struct drm_atomic_state *_state)
|
|
{
|
|
struct intel_atomic_state *state = to_intel_atomic_state(_state);
|
|
|
|
drm_atomic_state_default_release(&state->base);
|
|
kfree(state->global_objs);
|
|
|
|
i915_sw_fence_fini(&state->commit_ready);
|
|
|
|
kfree(state);
|
|
}
|
|
|
|
void intel_atomic_state_clear(struct drm_atomic_state *s)
|
|
{
|
|
struct intel_atomic_state *state = to_intel_atomic_state(s);
|
|
|
|
drm_atomic_state_default_clear(&state->base);
|
|
intel_atomic_clear_global_state(state);
|
|
|
|
state->dpll_set = state->modeset = false;
|
|
}
|
|
|
|
struct intel_crtc_state *
|
|
intel_atomic_get_crtc_state(struct drm_atomic_state *state,
|
|
struct intel_crtc *crtc)
|
|
{
|
|
struct drm_crtc_state *crtc_state;
|
|
crtc_state = drm_atomic_get_crtc_state(state, &crtc->base);
|
|
if (IS_ERR(crtc_state))
|
|
return ERR_CAST(crtc_state);
|
|
|
|
return to_intel_crtc_state(crtc_state);
|
|
}
|