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![Jani Nikula](/assets/img/avatar_default.png)
Backmerge to sync the DP MST atomic changes to drm-intel-next. Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2586 lines
73 KiB
C
2586 lines
73 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright (C) 2017 Google, Inc.
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* Copyright _ 2017-2019, Intel Corporation.
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*
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* Authors:
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* Sean Paul <seanpaul@chromium.org>
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* Ramalingam C <ramalingam.c@intel.com>
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*/
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#include <linux/component.h>
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#include <linux/i2c.h>
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#include <linux/random.h>
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#include <drm/display/drm_hdcp_helper.h>
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#include <drm/i915_component.h>
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#include "i915_drv.h"
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#include "i915_reg.h"
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#include "intel_connector.h"
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#include "intel_de.h"
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#include "intel_display_power.h"
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#include "intel_display_power_well.h"
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#include "intel_display_types.h"
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#include "intel_hdcp.h"
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#include "intel_hdcp_regs.h"
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#include "intel_pcode.h"
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#define KEY_LOAD_TRIES 5
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#define HDCP2_LC_RETRY_CNT 3
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static int intel_conn_to_vcpi(struct intel_connector *connector)
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{
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struct drm_dp_mst_topology_mgr *mgr;
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struct drm_dp_mst_atomic_payload *payload;
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struct drm_dp_mst_topology_state *mst_state;
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int vcpi = 0;
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/* For HDMI this is forced to be 0x0. For DP SST also this is 0x0. */
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if (!connector->port)
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return 0;
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mgr = connector->port->mgr;
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drm_modeset_lock(&mgr->base.lock, NULL);
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mst_state = to_drm_dp_mst_topology_state(mgr->base.state);
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payload = drm_atomic_get_mst_payload_state(mst_state, connector->port);
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if (drm_WARN_ON(mgr->dev, !payload))
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goto out;
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vcpi = payload->vcpi;
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if (drm_WARN_ON(mgr->dev, vcpi < 0)) {
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vcpi = 0;
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goto out;
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}
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out:
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drm_modeset_unlock(&mgr->base.lock);
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return vcpi;
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}
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/*
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* intel_hdcp_required_content_stream selects the most highest common possible HDCP
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* content_type for all streams in DP MST topology because security f/w doesn't
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* have any provision to mark content_type for each stream separately, it marks
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* all available streams with the content_type proivided at the time of port
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* authentication. This may prohibit the userspace to use type1 content on
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* HDCP 2.2 capable sink because of other sink are not capable of HDCP 2.2 in
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* DP MST topology. Though it is not compulsory, security fw should change its
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* policy to mark different content_types for different streams.
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*/
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static int
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intel_hdcp_required_content_stream(struct intel_digital_port *dig_port)
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{
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struct drm_connector_list_iter conn_iter;
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struct intel_digital_port *conn_dig_port;
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struct intel_connector *connector;
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struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
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struct hdcp_port_data *data = &dig_port->hdcp_port_data;
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bool enforce_type0 = false;
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int k;
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data->k = 0;
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if (dig_port->hdcp_auth_status)
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return 0;
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drm_connector_list_iter_begin(&i915->drm, &conn_iter);
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for_each_intel_connector_iter(connector, &conn_iter) {
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if (connector->base.status == connector_status_disconnected)
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continue;
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if (!intel_encoder_is_mst(intel_attached_encoder(connector)))
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continue;
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conn_dig_port = intel_attached_dig_port(connector);
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if (conn_dig_port != dig_port)
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continue;
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if (!enforce_type0 && !dig_port->hdcp_mst_type1_capable)
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enforce_type0 = true;
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data->streams[data->k].stream_id = intel_conn_to_vcpi(connector);
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data->k++;
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/* if there is only one active stream */
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if (dig_port->dp.active_mst_links <= 1)
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break;
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}
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drm_connector_list_iter_end(&conn_iter);
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if (drm_WARN_ON(&i915->drm, data->k > INTEL_NUM_PIPES(i915) || data->k == 0))
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return -EINVAL;
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/*
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* Apply common protection level across all streams in DP MST Topology.
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* Use highest supported content type for all streams in DP MST Topology.
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*/
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for (k = 0; k < data->k; k++)
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data->streams[k].stream_type =
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enforce_type0 ? DRM_MODE_HDCP_CONTENT_TYPE0 : DRM_MODE_HDCP_CONTENT_TYPE1;
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return 0;
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}
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static int intel_hdcp_prepare_streams(struct intel_connector *connector)
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{
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struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
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struct hdcp_port_data *data = &dig_port->hdcp_port_data;
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struct intel_hdcp *hdcp = &connector->hdcp;
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int ret;
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if (!intel_encoder_is_mst(intel_attached_encoder(connector))) {
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data->k = 1;
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data->streams[0].stream_type = hdcp->content_type;
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} else {
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ret = intel_hdcp_required_content_stream(dig_port);
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if (ret)
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return ret;
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}
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return 0;
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}
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static
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bool intel_hdcp_is_ksv_valid(u8 *ksv)
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{
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int i, ones = 0;
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/* KSV has 20 1's and 20 0's */
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for (i = 0; i < DRM_HDCP_KSV_LEN; i++)
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ones += hweight8(ksv[i]);
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if (ones != 20)
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return false;
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return true;
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}
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static
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int intel_hdcp_read_valid_bksv(struct intel_digital_port *dig_port,
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const struct intel_hdcp_shim *shim, u8 *bksv)
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{
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struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
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int ret, i, tries = 2;
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/* HDCP spec states that we must retry the bksv if it is invalid */
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for (i = 0; i < tries; i++) {
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ret = shim->read_bksv(dig_port, bksv);
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if (ret)
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return ret;
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if (intel_hdcp_is_ksv_valid(bksv))
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break;
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}
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if (i == tries) {
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drm_dbg_kms(&i915->drm, "Bksv is invalid\n");
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return -ENODEV;
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}
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return 0;
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}
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/* Is HDCP1.4 capable on Platform and Sink */
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bool intel_hdcp_capable(struct intel_connector *connector)
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{
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struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
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const struct intel_hdcp_shim *shim = connector->hdcp.shim;
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bool capable = false;
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u8 bksv[5];
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if (!shim)
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return capable;
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if (shim->hdcp_capable) {
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shim->hdcp_capable(dig_port, &capable);
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} else {
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if (!intel_hdcp_read_valid_bksv(dig_port, shim, bksv))
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capable = true;
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}
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return capable;
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}
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/* Is HDCP2.2 capable on Platform and Sink */
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bool intel_hdcp2_capable(struct intel_connector *connector)
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{
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struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
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struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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struct intel_hdcp *hdcp = &connector->hdcp;
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bool capable = false;
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/* I915 support for HDCP2.2 */
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if (!hdcp->hdcp2_supported)
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return false;
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/* MEI interface is solid */
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mutex_lock(&dev_priv->display.hdcp.comp_mutex);
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if (!dev_priv->display.hdcp.comp_added || !dev_priv->display.hdcp.master) {
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mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
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return false;
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}
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mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
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/* Sink's capability for HDCP2.2 */
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hdcp->shim->hdcp_2_2_capable(dig_port, &capable);
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return capable;
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}
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static bool intel_hdcp_in_use(struct drm_i915_private *dev_priv,
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enum transcoder cpu_transcoder, enum port port)
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{
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return intel_de_read(dev_priv,
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HDCP_STATUS(dev_priv, cpu_transcoder, port)) &
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HDCP_STATUS_ENC;
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}
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static bool intel_hdcp2_in_use(struct drm_i915_private *dev_priv,
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enum transcoder cpu_transcoder, enum port port)
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{
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return intel_de_read(dev_priv,
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HDCP2_STATUS(dev_priv, cpu_transcoder, port)) &
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LINK_ENCRYPTION_STATUS;
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}
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static int intel_hdcp_poll_ksv_fifo(struct intel_digital_port *dig_port,
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const struct intel_hdcp_shim *shim)
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{
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int ret, read_ret;
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bool ksv_ready;
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/* Poll for ksv list ready (spec says max time allowed is 5s) */
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ret = __wait_for(read_ret = shim->read_ksv_ready(dig_port,
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&ksv_ready),
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read_ret || ksv_ready, 5 * 1000 * 1000, 1000,
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100 * 1000);
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if (ret)
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return ret;
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if (read_ret)
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return read_ret;
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if (!ksv_ready)
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return -ETIMEDOUT;
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return 0;
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}
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static bool hdcp_key_loadable(struct drm_i915_private *dev_priv)
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{
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enum i915_power_well_id id;
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intel_wakeref_t wakeref;
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bool enabled = false;
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/*
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* On HSW and BDW, Display HW loads the Key as soon as Display resumes.
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* On all BXT+, SW can load the keys only when the PW#1 is turned on.
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*/
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if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
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id = HSW_DISP_PW_GLOBAL;
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else
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id = SKL_DISP_PW_1;
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/* PG1 (power well #1) needs to be enabled */
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with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref)
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enabled = intel_display_power_well_is_enabled(dev_priv, id);
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/*
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* Another req for hdcp key loadability is enabled state of pll for
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* cdclk. Without active crtc we wont land here. So we are assuming that
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* cdclk is already on.
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*/
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return enabled;
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}
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static void intel_hdcp_clear_keys(struct drm_i915_private *dev_priv)
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{
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intel_de_write(dev_priv, HDCP_KEY_CONF, HDCP_CLEAR_KEYS_TRIGGER);
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intel_de_write(dev_priv, HDCP_KEY_STATUS,
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HDCP_KEY_LOAD_DONE | HDCP_KEY_LOAD_STATUS | HDCP_FUSE_IN_PROGRESS | HDCP_FUSE_ERROR | HDCP_FUSE_DONE);
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}
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static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv)
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{
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int ret;
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u32 val;
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val = intel_de_read(dev_priv, HDCP_KEY_STATUS);
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if ((val & HDCP_KEY_LOAD_DONE) && (val & HDCP_KEY_LOAD_STATUS))
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return 0;
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/*
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* On HSW and BDW HW loads the HDCP1.4 Key when Display comes
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* out of reset. So if Key is not already loaded, its an error state.
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*/
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if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
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if (!(intel_de_read(dev_priv, HDCP_KEY_STATUS) & HDCP_KEY_LOAD_DONE))
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return -ENXIO;
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/*
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* Initiate loading the HDCP key from fuses.
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*
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* BXT+ platforms, HDCP key needs to be loaded by SW. Only display
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* version 9 platforms (minus BXT) differ in the key load trigger
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* process from other platforms. These platforms use the GT Driver
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* Mailbox interface.
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*/
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if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv)) {
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ret = snb_pcode_write(&dev_priv->uncore, SKL_PCODE_LOAD_HDCP_KEYS, 1);
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if (ret) {
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drm_err(&dev_priv->drm,
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"Failed to initiate HDCP key load (%d)\n",
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ret);
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return ret;
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}
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} else {
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intel_de_write(dev_priv, HDCP_KEY_CONF, HDCP_KEY_LOAD_TRIGGER);
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}
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/* Wait for the keys to load (500us) */
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ret = __intel_wait_for_register(&dev_priv->uncore, HDCP_KEY_STATUS,
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HDCP_KEY_LOAD_DONE, HDCP_KEY_LOAD_DONE,
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10, 1, &val);
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if (ret)
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return ret;
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else if (!(val & HDCP_KEY_LOAD_STATUS))
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return -ENXIO;
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/* Send Aksv over to PCH display for use in authentication */
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intel_de_write(dev_priv, HDCP_KEY_CONF, HDCP_AKSV_SEND_TRIGGER);
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return 0;
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}
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/* Returns updated SHA-1 index */
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static int intel_write_sha_text(struct drm_i915_private *dev_priv, u32 sha_text)
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{
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intel_de_write(dev_priv, HDCP_SHA_TEXT, sha_text);
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if (intel_de_wait_for_set(dev_priv, HDCP_REP_CTL, HDCP_SHA1_READY, 1)) {
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drm_err(&dev_priv->drm, "Timed out waiting for SHA1 ready\n");
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return -ETIMEDOUT;
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}
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return 0;
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}
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static
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u32 intel_hdcp_get_repeater_ctl(struct drm_i915_private *dev_priv,
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enum transcoder cpu_transcoder, enum port port)
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{
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if (DISPLAY_VER(dev_priv) >= 12) {
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switch (cpu_transcoder) {
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case TRANSCODER_A:
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return HDCP_TRANSA_REP_PRESENT |
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HDCP_TRANSA_SHA1_M0;
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case TRANSCODER_B:
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return HDCP_TRANSB_REP_PRESENT |
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HDCP_TRANSB_SHA1_M0;
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case TRANSCODER_C:
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return HDCP_TRANSC_REP_PRESENT |
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HDCP_TRANSC_SHA1_M0;
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case TRANSCODER_D:
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return HDCP_TRANSD_REP_PRESENT |
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HDCP_TRANSD_SHA1_M0;
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default:
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drm_err(&dev_priv->drm, "Unknown transcoder %d\n",
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cpu_transcoder);
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return -EINVAL;
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}
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}
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switch (port) {
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case PORT_A:
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return HDCP_DDIA_REP_PRESENT | HDCP_DDIA_SHA1_M0;
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case PORT_B:
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return HDCP_DDIB_REP_PRESENT | HDCP_DDIB_SHA1_M0;
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case PORT_C:
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return HDCP_DDIC_REP_PRESENT | HDCP_DDIC_SHA1_M0;
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case PORT_D:
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return HDCP_DDID_REP_PRESENT | HDCP_DDID_SHA1_M0;
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case PORT_E:
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return HDCP_DDIE_REP_PRESENT | HDCP_DDIE_SHA1_M0;
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default:
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drm_err(&dev_priv->drm, "Unknown port %d\n", port);
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return -EINVAL;
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}
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}
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static
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int intel_hdcp_validate_v_prime(struct intel_connector *connector,
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const struct intel_hdcp_shim *shim,
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u8 *ksv_fifo, u8 num_downstream, u8 *bstatus)
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{
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struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
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struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
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enum port port = dig_port->base.port;
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u32 vprime, sha_text, sha_leftovers, rep_ctl;
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int ret, i, j, sha_idx;
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/* Process V' values from the receiver */
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for (i = 0; i < DRM_HDCP_V_PRIME_NUM_PARTS; i++) {
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ret = shim->read_v_prime_part(dig_port, i, &vprime);
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if (ret)
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return ret;
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intel_de_write(dev_priv, HDCP_SHA_V_PRIME(i), vprime);
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}
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/*
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* We need to write the concatenation of all device KSVs, BINFO (DP) ||
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* BSTATUS (HDMI), and M0 (which is added via HDCP_REP_CTL). This byte
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* stream is written via the HDCP_SHA_TEXT register in 32-bit
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* increments. Every 64 bytes, we need to write HDCP_REP_CTL again. This
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* index will keep track of our progress through the 64 bytes as well as
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* helping us work the 40-bit KSVs through our 32-bit register.
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*
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* NOTE: data passed via HDCP_SHA_TEXT should be big-endian
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*/
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sha_idx = 0;
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sha_text = 0;
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sha_leftovers = 0;
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rep_ctl = intel_hdcp_get_repeater_ctl(dev_priv, cpu_transcoder, port);
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intel_de_write(dev_priv, HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32);
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for (i = 0; i < num_downstream; i++) {
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unsigned int sha_empty;
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u8 *ksv = &ksv_fifo[i * DRM_HDCP_KSV_LEN];
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/* Fill up the empty slots in sha_text and write it out */
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sha_empty = sizeof(sha_text) - sha_leftovers;
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for (j = 0; j < sha_empty; j++) {
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u8 off = ((sizeof(sha_text) - j - 1 - sha_leftovers) * 8);
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sha_text |= ksv[j] << off;
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}
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ret = intel_write_sha_text(dev_priv, sha_text);
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if (ret < 0)
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return ret;
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/* Programming guide writes this every 64 bytes */
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sha_idx += sizeof(sha_text);
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if (!(sha_idx % 64))
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intel_de_write(dev_priv, HDCP_REP_CTL,
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rep_ctl | HDCP_SHA1_TEXT_32);
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/* Store the leftover bytes from the ksv in sha_text */
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sha_leftovers = DRM_HDCP_KSV_LEN - sha_empty;
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sha_text = 0;
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for (j = 0; j < sha_leftovers; j++)
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sha_text |= ksv[sha_empty + j] <<
|
|
((sizeof(sha_text) - j - 1) * 8);
|
|
|
|
/*
|
|
* If we still have room in sha_text for more data, continue.
|
|
* Otherwise, write it out immediately.
|
|
*/
|
|
if (sizeof(sha_text) > sha_leftovers)
|
|
continue;
|
|
|
|
ret = intel_write_sha_text(dev_priv, sha_text);
|
|
if (ret < 0)
|
|
return ret;
|
|
sha_leftovers = 0;
|
|
sha_text = 0;
|
|
sha_idx += sizeof(sha_text);
|
|
}
|
|
|
|
/*
|
|
* We need to write BINFO/BSTATUS, and M0 now. Depending on how many
|
|
* bytes are leftover from the last ksv, we might be able to fit them
|
|
* all in sha_text (first 2 cases), or we might need to split them up
|
|
* into 2 writes (last 2 cases).
|
|
*/
|
|
if (sha_leftovers == 0) {
|
|
/* Write 16 bits of text, 16 bits of M0 */
|
|
intel_de_write(dev_priv, HDCP_REP_CTL,
|
|
rep_ctl | HDCP_SHA1_TEXT_16);
|
|
ret = intel_write_sha_text(dev_priv,
|
|
bstatus[0] << 8 | bstatus[1]);
|
|
if (ret < 0)
|
|
return ret;
|
|
sha_idx += sizeof(sha_text);
|
|
|
|
/* Write 32 bits of M0 */
|
|
intel_de_write(dev_priv, HDCP_REP_CTL,
|
|
rep_ctl | HDCP_SHA1_TEXT_0);
|
|
ret = intel_write_sha_text(dev_priv, 0);
|
|
if (ret < 0)
|
|
return ret;
|
|
sha_idx += sizeof(sha_text);
|
|
|
|
/* Write 16 bits of M0 */
|
|
intel_de_write(dev_priv, HDCP_REP_CTL,
|
|
rep_ctl | HDCP_SHA1_TEXT_16);
|
|
ret = intel_write_sha_text(dev_priv, 0);
|
|
if (ret < 0)
|
|
return ret;
|
|
sha_idx += sizeof(sha_text);
|
|
|
|
} else if (sha_leftovers == 1) {
|
|
/* Write 24 bits of text, 8 bits of M0 */
|
|
intel_de_write(dev_priv, HDCP_REP_CTL,
|
|
rep_ctl | HDCP_SHA1_TEXT_24);
|
|
sha_text |= bstatus[0] << 16 | bstatus[1] << 8;
|
|
/* Only 24-bits of data, must be in the LSB */
|
|
sha_text = (sha_text & 0xffffff00) >> 8;
|
|
ret = intel_write_sha_text(dev_priv, sha_text);
|
|
if (ret < 0)
|
|
return ret;
|
|
sha_idx += sizeof(sha_text);
|
|
|
|
/* Write 32 bits of M0 */
|
|
intel_de_write(dev_priv, HDCP_REP_CTL,
|
|
rep_ctl | HDCP_SHA1_TEXT_0);
|
|
ret = intel_write_sha_text(dev_priv, 0);
|
|
if (ret < 0)
|
|
return ret;
|
|
sha_idx += sizeof(sha_text);
|
|
|
|
/* Write 24 bits of M0 */
|
|
intel_de_write(dev_priv, HDCP_REP_CTL,
|
|
rep_ctl | HDCP_SHA1_TEXT_8);
|
|
ret = intel_write_sha_text(dev_priv, 0);
|
|
if (ret < 0)
|
|
return ret;
|
|
sha_idx += sizeof(sha_text);
|
|
|
|
} else if (sha_leftovers == 2) {
|
|
/* Write 32 bits of text */
|
|
intel_de_write(dev_priv, HDCP_REP_CTL,
|
|
rep_ctl | HDCP_SHA1_TEXT_32);
|
|
sha_text |= bstatus[0] << 8 | bstatus[1];
|
|
ret = intel_write_sha_text(dev_priv, sha_text);
|
|
if (ret < 0)
|
|
return ret;
|
|
sha_idx += sizeof(sha_text);
|
|
|
|
/* Write 64 bits of M0 */
|
|
intel_de_write(dev_priv, HDCP_REP_CTL,
|
|
rep_ctl | HDCP_SHA1_TEXT_0);
|
|
for (i = 0; i < 2; i++) {
|
|
ret = intel_write_sha_text(dev_priv, 0);
|
|
if (ret < 0)
|
|
return ret;
|
|
sha_idx += sizeof(sha_text);
|
|
}
|
|
|
|
/*
|
|
* Terminate the SHA-1 stream by hand. For the other leftover
|
|
* cases this is appended by the hardware.
|
|
*/
|
|
intel_de_write(dev_priv, HDCP_REP_CTL,
|
|
rep_ctl | HDCP_SHA1_TEXT_32);
|
|
sha_text = DRM_HDCP_SHA1_TERMINATOR << 24;
|
|
ret = intel_write_sha_text(dev_priv, sha_text);
|
|
if (ret < 0)
|
|
return ret;
|
|
sha_idx += sizeof(sha_text);
|
|
} else if (sha_leftovers == 3) {
|
|
/* Write 32 bits of text (filled from LSB) */
|
|
intel_de_write(dev_priv, HDCP_REP_CTL,
|
|
rep_ctl | HDCP_SHA1_TEXT_32);
|
|
sha_text |= bstatus[0];
|
|
ret = intel_write_sha_text(dev_priv, sha_text);
|
|
if (ret < 0)
|
|
return ret;
|
|
sha_idx += sizeof(sha_text);
|
|
|
|
/* Write 8 bits of text (filled from LSB), 24 bits of M0 */
|
|
intel_de_write(dev_priv, HDCP_REP_CTL,
|
|
rep_ctl | HDCP_SHA1_TEXT_8);
|
|
ret = intel_write_sha_text(dev_priv, bstatus[1]);
|
|
if (ret < 0)
|
|
return ret;
|
|
sha_idx += sizeof(sha_text);
|
|
|
|
/* Write 32 bits of M0 */
|
|
intel_de_write(dev_priv, HDCP_REP_CTL,
|
|
rep_ctl | HDCP_SHA1_TEXT_0);
|
|
ret = intel_write_sha_text(dev_priv, 0);
|
|
if (ret < 0)
|
|
return ret;
|
|
sha_idx += sizeof(sha_text);
|
|
|
|
/* Write 8 bits of M0 */
|
|
intel_de_write(dev_priv, HDCP_REP_CTL,
|
|
rep_ctl | HDCP_SHA1_TEXT_24);
|
|
ret = intel_write_sha_text(dev_priv, 0);
|
|
if (ret < 0)
|
|
return ret;
|
|
sha_idx += sizeof(sha_text);
|
|
} else {
|
|
drm_dbg_kms(&dev_priv->drm, "Invalid number of leftovers %d\n",
|
|
sha_leftovers);
|
|
return -EINVAL;
|
|
}
|
|
|
|
intel_de_write(dev_priv, HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32);
|
|
/* Fill up to 64-4 bytes with zeros (leave the last write for length) */
|
|
while ((sha_idx % 64) < (64 - sizeof(sha_text))) {
|
|
ret = intel_write_sha_text(dev_priv, 0);
|
|
if (ret < 0)
|
|
return ret;
|
|
sha_idx += sizeof(sha_text);
|
|
}
|
|
|
|
/*
|
|
* Last write gets the length of the concatenation in bits. That is:
|
|
* - 5 bytes per device
|
|
* - 10 bytes for BINFO/BSTATUS(2), M0(8)
|
|
*/
|
|
sha_text = (num_downstream * 5 + 10) * 8;
|
|
ret = intel_write_sha_text(dev_priv, sha_text);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/* Tell the HW we're done with the hash and wait for it to ACK */
|
|
intel_de_write(dev_priv, HDCP_REP_CTL,
|
|
rep_ctl | HDCP_SHA1_COMPLETE_HASH);
|
|
if (intel_de_wait_for_set(dev_priv, HDCP_REP_CTL,
|
|
HDCP_SHA1_COMPLETE, 1)) {
|
|
drm_err(&dev_priv->drm, "Timed out waiting for SHA1 complete\n");
|
|
return -ETIMEDOUT;
|
|
}
|
|
if (!(intel_de_read(dev_priv, HDCP_REP_CTL) & HDCP_SHA1_V_MATCH)) {
|
|
drm_dbg_kms(&dev_priv->drm, "SHA-1 mismatch, HDCP failed\n");
|
|
return -ENXIO;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Implements Part 2 of the HDCP authorization procedure */
|
|
static
|
|
int intel_hdcp_auth_downstream(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
const struct intel_hdcp_shim *shim = connector->hdcp.shim;
|
|
u8 bstatus[2], num_downstream, *ksv_fifo;
|
|
int ret, i, tries = 3;
|
|
|
|
ret = intel_hdcp_poll_ksv_fifo(dig_port, shim);
|
|
if (ret) {
|
|
drm_dbg_kms(&dev_priv->drm,
|
|
"KSV list failed to become ready (%d)\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = shim->read_bstatus(dig_port, bstatus);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (DRM_HDCP_MAX_DEVICE_EXCEEDED(bstatus[0]) ||
|
|
DRM_HDCP_MAX_CASCADE_EXCEEDED(bstatus[1])) {
|
|
drm_dbg_kms(&dev_priv->drm, "Max Topology Limit Exceeded\n");
|
|
return -EPERM;
|
|
}
|
|
|
|
/*
|
|
* When repeater reports 0 device count, HDCP1.4 spec allows disabling
|
|
* the HDCP encryption. That implies that repeater can't have its own
|
|
* display. As there is no consumption of encrypted content in the
|
|
* repeater with 0 downstream devices, we are failing the
|
|
* authentication.
|
|
*/
|
|
num_downstream = DRM_HDCP_NUM_DOWNSTREAM(bstatus[0]);
|
|
if (num_downstream == 0) {
|
|
drm_dbg_kms(&dev_priv->drm,
|
|
"Repeater with zero downstream devices\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
ksv_fifo = kcalloc(DRM_HDCP_KSV_LEN, num_downstream, GFP_KERNEL);
|
|
if (!ksv_fifo) {
|
|
drm_dbg_kms(&dev_priv->drm, "Out of mem: ksv_fifo\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
ret = shim->read_ksv_fifo(dig_port, num_downstream, ksv_fifo);
|
|
if (ret)
|
|
goto err;
|
|
|
|
if (drm_hdcp_check_ksvs_revoked(&dev_priv->drm, ksv_fifo,
|
|
num_downstream) > 0) {
|
|
drm_err(&dev_priv->drm, "Revoked Ksv(s) in ksv_fifo\n");
|
|
ret = -EPERM;
|
|
goto err;
|
|
}
|
|
|
|
/*
|
|
* When V prime mismatches, DP Spec mandates re-read of
|
|
* V prime atleast twice.
|
|
*/
|
|
for (i = 0; i < tries; i++) {
|
|
ret = intel_hdcp_validate_v_prime(connector, shim,
|
|
ksv_fifo, num_downstream,
|
|
bstatus);
|
|
if (!ret)
|
|
break;
|
|
}
|
|
|
|
if (i == tries) {
|
|
drm_dbg_kms(&dev_priv->drm,
|
|
"V Prime validation failed.(%d)\n", ret);
|
|
goto err;
|
|
}
|
|
|
|
drm_dbg_kms(&dev_priv->drm, "HDCP is enabled (%d downstream devices)\n",
|
|
num_downstream);
|
|
ret = 0;
|
|
err:
|
|
kfree(ksv_fifo);
|
|
return ret;
|
|
}
|
|
|
|
/* Implements Part 1 of the HDCP authorization procedure */
|
|
static int intel_hdcp_auth(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
const struct intel_hdcp_shim *shim = hdcp->shim;
|
|
enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
|
|
enum port port = dig_port->base.port;
|
|
unsigned long r0_prime_gen_start;
|
|
int ret, i, tries = 2;
|
|
union {
|
|
u32 reg[2];
|
|
u8 shim[DRM_HDCP_AN_LEN];
|
|
} an;
|
|
union {
|
|
u32 reg[2];
|
|
u8 shim[DRM_HDCP_KSV_LEN];
|
|
} bksv;
|
|
union {
|
|
u32 reg;
|
|
u8 shim[DRM_HDCP_RI_LEN];
|
|
} ri;
|
|
bool repeater_present, hdcp_capable;
|
|
|
|
/*
|
|
* Detects whether the display is HDCP capable. Although we check for
|
|
* valid Bksv below, the HDCP over DP spec requires that we check
|
|
* whether the display supports HDCP before we write An. For HDMI
|
|
* displays, this is not necessary.
|
|
*/
|
|
if (shim->hdcp_capable) {
|
|
ret = shim->hdcp_capable(dig_port, &hdcp_capable);
|
|
if (ret)
|
|
return ret;
|
|
if (!hdcp_capable) {
|
|
drm_dbg_kms(&dev_priv->drm,
|
|
"Panel is not HDCP capable\n");
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
/* Initialize An with 2 random values and acquire it */
|
|
for (i = 0; i < 2; i++)
|
|
intel_de_write(dev_priv,
|
|
HDCP_ANINIT(dev_priv, cpu_transcoder, port),
|
|
get_random_u32());
|
|
intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port),
|
|
HDCP_CONF_CAPTURE_AN);
|
|
|
|
/* Wait for An to be acquired */
|
|
if (intel_de_wait_for_set(dev_priv,
|
|
HDCP_STATUS(dev_priv, cpu_transcoder, port),
|
|
HDCP_STATUS_AN_READY, 1)) {
|
|
drm_err(&dev_priv->drm, "Timed out waiting for An\n");
|
|
return -ETIMEDOUT;
|
|
}
|
|
|
|
an.reg[0] = intel_de_read(dev_priv,
|
|
HDCP_ANLO(dev_priv, cpu_transcoder, port));
|
|
an.reg[1] = intel_de_read(dev_priv,
|
|
HDCP_ANHI(dev_priv, cpu_transcoder, port));
|
|
ret = shim->write_an_aksv(dig_port, an.shim);
|
|
if (ret)
|
|
return ret;
|
|
|
|
r0_prime_gen_start = jiffies;
|
|
|
|
memset(&bksv, 0, sizeof(bksv));
|
|
|
|
ret = intel_hdcp_read_valid_bksv(dig_port, shim, bksv.shim);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
if (drm_hdcp_check_ksvs_revoked(&dev_priv->drm, bksv.shim, 1) > 0) {
|
|
drm_err(&dev_priv->drm, "BKSV is revoked\n");
|
|
return -EPERM;
|
|
}
|
|
|
|
intel_de_write(dev_priv, HDCP_BKSVLO(dev_priv, cpu_transcoder, port),
|
|
bksv.reg[0]);
|
|
intel_de_write(dev_priv, HDCP_BKSVHI(dev_priv, cpu_transcoder, port),
|
|
bksv.reg[1]);
|
|
|
|
ret = shim->repeater_present(dig_port, &repeater_present);
|
|
if (ret)
|
|
return ret;
|
|
if (repeater_present)
|
|
intel_de_write(dev_priv, HDCP_REP_CTL,
|
|
intel_hdcp_get_repeater_ctl(dev_priv, cpu_transcoder, port));
|
|
|
|
ret = shim->toggle_signalling(dig_port, cpu_transcoder, true);
|
|
if (ret)
|
|
return ret;
|
|
|
|
intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port),
|
|
HDCP_CONF_AUTH_AND_ENC);
|
|
|
|
/* Wait for R0 ready */
|
|
if (wait_for(intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port)) &
|
|
(HDCP_STATUS_R0_READY | HDCP_STATUS_ENC), 1)) {
|
|
drm_err(&dev_priv->drm, "Timed out waiting for R0 ready\n");
|
|
return -ETIMEDOUT;
|
|
}
|
|
|
|
/*
|
|
* Wait for R0' to become available. The spec says 100ms from Aksv, but
|
|
* some monitors can take longer than this. We'll set the timeout at
|
|
* 300ms just to be sure.
|
|
*
|
|
* On DP, there's an R0_READY bit available but no such bit
|
|
* exists on HDMI. Since the upper-bound is the same, we'll just do
|
|
* the stupid thing instead of polling on one and not the other.
|
|
*/
|
|
wait_remaining_ms_from_jiffies(r0_prime_gen_start, 300);
|
|
|
|
tries = 3;
|
|
|
|
/*
|
|
* DP HDCP Spec mandates the two more reattempt to read R0, incase
|
|
* of R0 mismatch.
|
|
*/
|
|
for (i = 0; i < tries; i++) {
|
|
ri.reg = 0;
|
|
ret = shim->read_ri_prime(dig_port, ri.shim);
|
|
if (ret)
|
|
return ret;
|
|
intel_de_write(dev_priv,
|
|
HDCP_RPRIME(dev_priv, cpu_transcoder, port),
|
|
ri.reg);
|
|
|
|
/* Wait for Ri prime match */
|
|
if (!wait_for(intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port)) &
|
|
(HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1))
|
|
break;
|
|
}
|
|
|
|
if (i == tries) {
|
|
drm_dbg_kms(&dev_priv->drm,
|
|
"Timed out waiting for Ri prime match (%x)\n",
|
|
intel_de_read(dev_priv, HDCP_STATUS(dev_priv,
|
|
cpu_transcoder, port)));
|
|
return -ETIMEDOUT;
|
|
}
|
|
|
|
/* Wait for encryption confirmation */
|
|
if (intel_de_wait_for_set(dev_priv,
|
|
HDCP_STATUS(dev_priv, cpu_transcoder, port),
|
|
HDCP_STATUS_ENC,
|
|
HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
|
|
drm_err(&dev_priv->drm, "Timed out waiting for encryption\n");
|
|
return -ETIMEDOUT;
|
|
}
|
|
|
|
/* DP MST Auth Part 1 Step 2.a and Step 2.b */
|
|
if (shim->stream_encryption) {
|
|
ret = shim->stream_encryption(connector, true);
|
|
if (ret) {
|
|
drm_err(&dev_priv->drm, "[%s:%d] Failed to enable HDCP 1.4 stream enc\n",
|
|
connector->base.name, connector->base.base.id);
|
|
return ret;
|
|
}
|
|
drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 transcoder: %s stream encrypted\n",
|
|
transcoder_name(hdcp->stream_transcoder));
|
|
}
|
|
|
|
if (repeater_present)
|
|
return intel_hdcp_auth_downstream(connector);
|
|
|
|
drm_dbg_kms(&dev_priv->drm, "HDCP is enabled (no repeater present)\n");
|
|
return 0;
|
|
}
|
|
|
|
static int _intel_hdcp_disable(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
enum port port = dig_port->base.port;
|
|
enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
|
|
u32 repeater_ctl;
|
|
int ret;
|
|
|
|
drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP is being disabled...\n",
|
|
connector->base.name, connector->base.base.id);
|
|
|
|
if (hdcp->shim->stream_encryption) {
|
|
ret = hdcp->shim->stream_encryption(connector, false);
|
|
if (ret) {
|
|
drm_err(&dev_priv->drm, "[%s:%d] Failed to disable HDCP 1.4 stream enc\n",
|
|
connector->base.name, connector->base.base.id);
|
|
return ret;
|
|
}
|
|
drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 transcoder: %s stream encryption disabled\n",
|
|
transcoder_name(hdcp->stream_transcoder));
|
|
/*
|
|
* If there are other connectors on this port using HDCP,
|
|
* don't disable it until it disabled HDCP encryption for
|
|
* all connectors in MST topology.
|
|
*/
|
|
if (dig_port->num_hdcp_streams > 0)
|
|
return 0;
|
|
}
|
|
|
|
hdcp->hdcp_encrypted = false;
|
|
intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port), 0);
|
|
if (intel_de_wait_for_clear(dev_priv,
|
|
HDCP_STATUS(dev_priv, cpu_transcoder, port),
|
|
~0, HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
|
|
drm_err(&dev_priv->drm,
|
|
"Failed to disable HDCP, timeout clearing status\n");
|
|
return -ETIMEDOUT;
|
|
}
|
|
|
|
repeater_ctl = intel_hdcp_get_repeater_ctl(dev_priv, cpu_transcoder,
|
|
port);
|
|
intel_de_write(dev_priv, HDCP_REP_CTL,
|
|
intel_de_read(dev_priv, HDCP_REP_CTL) & ~repeater_ctl);
|
|
|
|
ret = hdcp->shim->toggle_signalling(dig_port, cpu_transcoder, false);
|
|
if (ret) {
|
|
drm_err(&dev_priv->drm, "Failed to disable HDCP signalling\n");
|
|
return ret;
|
|
}
|
|
|
|
drm_dbg_kms(&dev_priv->drm, "HDCP is disabled\n");
|
|
return 0;
|
|
}
|
|
|
|
static int _intel_hdcp_enable(struct intel_connector *connector)
|
|
{
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
int i, ret, tries = 3;
|
|
|
|
drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP is being enabled...\n",
|
|
connector->base.name, connector->base.base.id);
|
|
|
|
if (!hdcp_key_loadable(dev_priv)) {
|
|
drm_err(&dev_priv->drm, "HDCP key Load is not possible\n");
|
|
return -ENXIO;
|
|
}
|
|
|
|
for (i = 0; i < KEY_LOAD_TRIES; i++) {
|
|
ret = intel_hdcp_load_keys(dev_priv);
|
|
if (!ret)
|
|
break;
|
|
intel_hdcp_clear_keys(dev_priv);
|
|
}
|
|
if (ret) {
|
|
drm_err(&dev_priv->drm, "Could not load HDCP keys, (%d)\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
|
|
/* Incase of authentication failures, HDCP spec expects reauth. */
|
|
for (i = 0; i < tries; i++) {
|
|
ret = intel_hdcp_auth(connector);
|
|
if (!ret) {
|
|
hdcp->hdcp_encrypted = true;
|
|
return 0;
|
|
}
|
|
|
|
drm_dbg_kms(&dev_priv->drm, "HDCP Auth failure (%d)\n", ret);
|
|
|
|
/* Ensuring HDCP encryption and signalling are stopped. */
|
|
_intel_hdcp_disable(connector);
|
|
}
|
|
|
|
drm_dbg_kms(&dev_priv->drm,
|
|
"HDCP authentication failed (%d tries/%d)\n", tries, ret);
|
|
return ret;
|
|
}
|
|
|
|
static struct intel_connector *intel_hdcp_to_connector(struct intel_hdcp *hdcp)
|
|
{
|
|
return container_of(hdcp, struct intel_connector, hdcp);
|
|
}
|
|
|
|
static void intel_hdcp_update_value(struct intel_connector *connector,
|
|
u64 value, bool update_property)
|
|
{
|
|
struct drm_device *dev = connector->base.dev;
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
|
|
drm_WARN_ON(connector->base.dev, !mutex_is_locked(&hdcp->mutex));
|
|
|
|
if (hdcp->value == value)
|
|
return;
|
|
|
|
drm_WARN_ON(dev, !mutex_is_locked(&dig_port->hdcp_mutex));
|
|
|
|
if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED) {
|
|
if (!drm_WARN_ON(dev, dig_port->num_hdcp_streams == 0))
|
|
dig_port->num_hdcp_streams--;
|
|
} else if (value == DRM_MODE_CONTENT_PROTECTION_ENABLED) {
|
|
dig_port->num_hdcp_streams++;
|
|
}
|
|
|
|
hdcp->value = value;
|
|
if (update_property) {
|
|
drm_connector_get(&connector->base);
|
|
schedule_work(&hdcp->prop_work);
|
|
}
|
|
}
|
|
|
|
/* Implements Part 3 of the HDCP authorization procedure */
|
|
static int intel_hdcp_check_link(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
enum port port = dig_port->base.port;
|
|
enum transcoder cpu_transcoder;
|
|
int ret = 0;
|
|
|
|
mutex_lock(&hdcp->mutex);
|
|
mutex_lock(&dig_port->hdcp_mutex);
|
|
|
|
cpu_transcoder = hdcp->cpu_transcoder;
|
|
|
|
/* Check_link valid only when HDCP1.4 is enabled */
|
|
if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||
|
|
!hdcp->hdcp_encrypted) {
|
|
ret = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
if (drm_WARN_ON(&dev_priv->drm,
|
|
!intel_hdcp_in_use(dev_priv, cpu_transcoder, port))) {
|
|
drm_err(&dev_priv->drm,
|
|
"%s:%d HDCP link stopped encryption,%x\n",
|
|
connector->base.name, connector->base.base.id,
|
|
intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port)));
|
|
ret = -ENXIO;
|
|
intel_hdcp_update_value(connector,
|
|
DRM_MODE_CONTENT_PROTECTION_DESIRED,
|
|
true);
|
|
goto out;
|
|
}
|
|
|
|
if (hdcp->shim->check_link(dig_port, connector)) {
|
|
if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
|
|
intel_hdcp_update_value(connector,
|
|
DRM_MODE_CONTENT_PROTECTION_ENABLED, true);
|
|
}
|
|
goto out;
|
|
}
|
|
|
|
drm_dbg_kms(&dev_priv->drm,
|
|
"[%s:%d] HDCP link failed, retrying authentication\n",
|
|
connector->base.name, connector->base.base.id);
|
|
|
|
ret = _intel_hdcp_disable(connector);
|
|
if (ret) {
|
|
drm_err(&dev_priv->drm, "Failed to disable hdcp (%d)\n", ret);
|
|
intel_hdcp_update_value(connector,
|
|
DRM_MODE_CONTENT_PROTECTION_DESIRED,
|
|
true);
|
|
goto out;
|
|
}
|
|
|
|
ret = _intel_hdcp_enable(connector);
|
|
if (ret) {
|
|
drm_err(&dev_priv->drm, "Failed to enable hdcp (%d)\n", ret);
|
|
intel_hdcp_update_value(connector,
|
|
DRM_MODE_CONTENT_PROTECTION_DESIRED,
|
|
true);
|
|
goto out;
|
|
}
|
|
|
|
out:
|
|
mutex_unlock(&dig_port->hdcp_mutex);
|
|
mutex_unlock(&hdcp->mutex);
|
|
return ret;
|
|
}
|
|
|
|
static void intel_hdcp_prop_work(struct work_struct *work)
|
|
{
|
|
struct intel_hdcp *hdcp = container_of(work, struct intel_hdcp,
|
|
prop_work);
|
|
struct intel_connector *connector = intel_hdcp_to_connector(hdcp);
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
|
|
drm_modeset_lock(&dev_priv->drm.mode_config.connection_mutex, NULL);
|
|
mutex_lock(&hdcp->mutex);
|
|
|
|
/*
|
|
* This worker is only used to flip between ENABLED/DESIRED. Either of
|
|
* those to UNDESIRED is handled by core. If value == UNDESIRED,
|
|
* we're running just after hdcp has been disabled, so just exit
|
|
*/
|
|
if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
|
|
drm_hdcp_update_content_protection(&connector->base,
|
|
hdcp->value);
|
|
|
|
mutex_unlock(&hdcp->mutex);
|
|
drm_modeset_unlock(&dev_priv->drm.mode_config.connection_mutex);
|
|
|
|
drm_connector_put(&connector->base);
|
|
}
|
|
|
|
bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port)
|
|
{
|
|
return RUNTIME_INFO(dev_priv)->has_hdcp &&
|
|
(DISPLAY_VER(dev_priv) >= 12 || port < PORT_E);
|
|
}
|
|
|
|
static int
|
|
hdcp2_prepare_ake_init(struct intel_connector *connector,
|
|
struct hdcp2_ake_init *ake_data)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct i915_hdcp_comp_master *comp;
|
|
int ret;
|
|
|
|
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
|
|
comp = dev_priv->display.hdcp.master;
|
|
|
|
if (!comp || !comp->ops) {
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = comp->ops->initiate_hdcp2_session(comp->mei_dev, data, ake_data);
|
|
if (ret)
|
|
drm_dbg_kms(&dev_priv->drm, "Prepare_ake_init failed. %d\n",
|
|
ret);
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
hdcp2_verify_rx_cert_prepare_km(struct intel_connector *connector,
|
|
struct hdcp2_ake_send_cert *rx_cert,
|
|
bool *paired,
|
|
struct hdcp2_ake_no_stored_km *ek_pub_km,
|
|
size_t *msg_sz)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct i915_hdcp_comp_master *comp;
|
|
int ret;
|
|
|
|
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
|
|
comp = dev_priv->display.hdcp.master;
|
|
|
|
if (!comp || !comp->ops) {
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = comp->ops->verify_receiver_cert_prepare_km(comp->mei_dev, data,
|
|
rx_cert, paired,
|
|
ek_pub_km, msg_sz);
|
|
if (ret < 0)
|
|
drm_dbg_kms(&dev_priv->drm, "Verify rx_cert failed. %d\n",
|
|
ret);
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int hdcp2_verify_hprime(struct intel_connector *connector,
|
|
struct hdcp2_ake_send_hprime *rx_hprime)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct i915_hdcp_comp_master *comp;
|
|
int ret;
|
|
|
|
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
|
|
comp = dev_priv->display.hdcp.master;
|
|
|
|
if (!comp || !comp->ops) {
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = comp->ops->verify_hprime(comp->mei_dev, data, rx_hprime);
|
|
if (ret < 0)
|
|
drm_dbg_kms(&dev_priv->drm, "Verify hprime failed. %d\n", ret);
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
hdcp2_store_pairing_info(struct intel_connector *connector,
|
|
struct hdcp2_ake_send_pairing_info *pairing_info)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct i915_hdcp_comp_master *comp;
|
|
int ret;
|
|
|
|
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
|
|
comp = dev_priv->display.hdcp.master;
|
|
|
|
if (!comp || !comp->ops) {
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = comp->ops->store_pairing_info(comp->mei_dev, data, pairing_info);
|
|
if (ret < 0)
|
|
drm_dbg_kms(&dev_priv->drm, "Store pairing info failed. %d\n",
|
|
ret);
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
hdcp2_prepare_lc_init(struct intel_connector *connector,
|
|
struct hdcp2_lc_init *lc_init)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct i915_hdcp_comp_master *comp;
|
|
int ret;
|
|
|
|
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
|
|
comp = dev_priv->display.hdcp.master;
|
|
|
|
if (!comp || !comp->ops) {
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = comp->ops->initiate_locality_check(comp->mei_dev, data, lc_init);
|
|
if (ret < 0)
|
|
drm_dbg_kms(&dev_priv->drm, "Prepare lc_init failed. %d\n",
|
|
ret);
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
hdcp2_verify_lprime(struct intel_connector *connector,
|
|
struct hdcp2_lc_send_lprime *rx_lprime)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct i915_hdcp_comp_master *comp;
|
|
int ret;
|
|
|
|
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
|
|
comp = dev_priv->display.hdcp.master;
|
|
|
|
if (!comp || !comp->ops) {
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = comp->ops->verify_lprime(comp->mei_dev, data, rx_lprime);
|
|
if (ret < 0)
|
|
drm_dbg_kms(&dev_priv->drm, "Verify L_Prime failed. %d\n",
|
|
ret);
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int hdcp2_prepare_skey(struct intel_connector *connector,
|
|
struct hdcp2_ske_send_eks *ske_data)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct i915_hdcp_comp_master *comp;
|
|
int ret;
|
|
|
|
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
|
|
comp = dev_priv->display.hdcp.master;
|
|
|
|
if (!comp || !comp->ops) {
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = comp->ops->get_session_key(comp->mei_dev, data, ske_data);
|
|
if (ret < 0)
|
|
drm_dbg_kms(&dev_priv->drm, "Get session key failed. %d\n",
|
|
ret);
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
hdcp2_verify_rep_topology_prepare_ack(struct intel_connector *connector,
|
|
struct hdcp2_rep_send_receiverid_list
|
|
*rep_topology,
|
|
struct hdcp2_rep_send_ack *rep_send_ack)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct i915_hdcp_comp_master *comp;
|
|
int ret;
|
|
|
|
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
|
|
comp = dev_priv->display.hdcp.master;
|
|
|
|
if (!comp || !comp->ops) {
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = comp->ops->repeater_check_flow_prepare_ack(comp->mei_dev, data,
|
|
rep_topology,
|
|
rep_send_ack);
|
|
if (ret < 0)
|
|
drm_dbg_kms(&dev_priv->drm,
|
|
"Verify rep topology failed. %d\n", ret);
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
hdcp2_verify_mprime(struct intel_connector *connector,
|
|
struct hdcp2_rep_stream_ready *stream_ready)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct i915_hdcp_comp_master *comp;
|
|
int ret;
|
|
|
|
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
|
|
comp = dev_priv->display.hdcp.master;
|
|
|
|
if (!comp || !comp->ops) {
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = comp->ops->verify_mprime(comp->mei_dev, data, stream_ready);
|
|
if (ret < 0)
|
|
drm_dbg_kms(&dev_priv->drm, "Verify mprime failed. %d\n", ret);
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int hdcp2_authenticate_port(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct i915_hdcp_comp_master *comp;
|
|
int ret;
|
|
|
|
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
|
|
comp = dev_priv->display.hdcp.master;
|
|
|
|
if (!comp || !comp->ops) {
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = comp->ops->enable_hdcp_authentication(comp->mei_dev, data);
|
|
if (ret < 0)
|
|
drm_dbg_kms(&dev_priv->drm, "Enable hdcp auth failed. %d\n",
|
|
ret);
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int hdcp2_close_mei_session(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct i915_hdcp_comp_master *comp;
|
|
int ret;
|
|
|
|
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
|
|
comp = dev_priv->display.hdcp.master;
|
|
|
|
if (!comp || !comp->ops) {
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = comp->ops->close_hdcp_session(comp->mei_dev,
|
|
&dig_port->hdcp_port_data);
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int hdcp2_deauthenticate_port(struct intel_connector *connector)
|
|
{
|
|
return hdcp2_close_mei_session(connector);
|
|
}
|
|
|
|
/* Authentication flow starts from here */
|
|
static int hdcp2_authentication_key_exchange(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
union {
|
|
struct hdcp2_ake_init ake_init;
|
|
struct hdcp2_ake_send_cert send_cert;
|
|
struct hdcp2_ake_no_stored_km no_stored_km;
|
|
struct hdcp2_ake_send_hprime send_hprime;
|
|
struct hdcp2_ake_send_pairing_info pairing_info;
|
|
} msgs;
|
|
const struct intel_hdcp_shim *shim = hdcp->shim;
|
|
size_t size;
|
|
int ret;
|
|
|
|
/* Init for seq_num */
|
|
hdcp->seq_num_v = 0;
|
|
hdcp->seq_num_m = 0;
|
|
|
|
ret = hdcp2_prepare_ake_init(connector, &msgs.ake_init);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = shim->write_2_2_msg(dig_port, &msgs.ake_init,
|
|
sizeof(msgs.ake_init));
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = shim->read_2_2_msg(dig_port, HDCP_2_2_AKE_SEND_CERT,
|
|
&msgs.send_cert, sizeof(msgs.send_cert));
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
if (msgs.send_cert.rx_caps[0] != HDCP_2_2_RX_CAPS_VERSION_VAL) {
|
|
drm_dbg_kms(&dev_priv->drm, "cert.rx_caps dont claim HDCP2.2\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
hdcp->is_repeater = HDCP_2_2_RX_REPEATER(msgs.send_cert.rx_caps[2]);
|
|
|
|
if (drm_hdcp_check_ksvs_revoked(&dev_priv->drm,
|
|
msgs.send_cert.cert_rx.receiver_id,
|
|
1) > 0) {
|
|
drm_err(&dev_priv->drm, "Receiver ID is revoked\n");
|
|
return -EPERM;
|
|
}
|
|
|
|
/*
|
|
* Here msgs.no_stored_km will hold msgs corresponding to the km
|
|
* stored also.
|
|
*/
|
|
ret = hdcp2_verify_rx_cert_prepare_km(connector, &msgs.send_cert,
|
|
&hdcp->is_paired,
|
|
&msgs.no_stored_km, &size);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = shim->write_2_2_msg(dig_port, &msgs.no_stored_km, size);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = shim->read_2_2_msg(dig_port, HDCP_2_2_AKE_SEND_HPRIME,
|
|
&msgs.send_hprime, sizeof(msgs.send_hprime));
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = hdcp2_verify_hprime(connector, &msgs.send_hprime);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
if (!hdcp->is_paired) {
|
|
/* Pairing is required */
|
|
ret = shim->read_2_2_msg(dig_port,
|
|
HDCP_2_2_AKE_SEND_PAIRING_INFO,
|
|
&msgs.pairing_info,
|
|
sizeof(msgs.pairing_info));
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = hdcp2_store_pairing_info(connector, &msgs.pairing_info);
|
|
if (ret < 0)
|
|
return ret;
|
|
hdcp->is_paired = true;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int hdcp2_locality_check(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
union {
|
|
struct hdcp2_lc_init lc_init;
|
|
struct hdcp2_lc_send_lprime send_lprime;
|
|
} msgs;
|
|
const struct intel_hdcp_shim *shim = hdcp->shim;
|
|
int tries = HDCP2_LC_RETRY_CNT, ret, i;
|
|
|
|
for (i = 0; i < tries; i++) {
|
|
ret = hdcp2_prepare_lc_init(connector, &msgs.lc_init);
|
|
if (ret < 0)
|
|
continue;
|
|
|
|
ret = shim->write_2_2_msg(dig_port, &msgs.lc_init,
|
|
sizeof(msgs.lc_init));
|
|
if (ret < 0)
|
|
continue;
|
|
|
|
ret = shim->read_2_2_msg(dig_port,
|
|
HDCP_2_2_LC_SEND_LPRIME,
|
|
&msgs.send_lprime,
|
|
sizeof(msgs.send_lprime));
|
|
if (ret < 0)
|
|
continue;
|
|
|
|
ret = hdcp2_verify_lprime(connector, &msgs.send_lprime);
|
|
if (!ret)
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int hdcp2_session_key_exchange(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
struct hdcp2_ske_send_eks send_eks;
|
|
int ret;
|
|
|
|
ret = hdcp2_prepare_skey(connector, &send_eks);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = hdcp->shim->write_2_2_msg(dig_port, &send_eks,
|
|
sizeof(send_eks));
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static
|
|
int _hdcp2_propagate_stream_management_info(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
union {
|
|
struct hdcp2_rep_stream_manage stream_manage;
|
|
struct hdcp2_rep_stream_ready stream_ready;
|
|
} msgs;
|
|
const struct intel_hdcp_shim *shim = hdcp->shim;
|
|
int ret, streams_size_delta, i;
|
|
|
|
if (connector->hdcp.seq_num_m > HDCP_2_2_SEQ_NUM_MAX)
|
|
return -ERANGE;
|
|
|
|
/* Prepare RepeaterAuth_Stream_Manage msg */
|
|
msgs.stream_manage.msg_id = HDCP_2_2_REP_STREAM_MANAGE;
|
|
drm_hdcp_cpu_to_be24(msgs.stream_manage.seq_num_m, hdcp->seq_num_m);
|
|
|
|
msgs.stream_manage.k = cpu_to_be16(data->k);
|
|
|
|
for (i = 0; i < data->k; i++) {
|
|
msgs.stream_manage.streams[i].stream_id = data->streams[i].stream_id;
|
|
msgs.stream_manage.streams[i].stream_type = data->streams[i].stream_type;
|
|
}
|
|
|
|
streams_size_delta = (HDCP_2_2_MAX_CONTENT_STREAMS_CNT - data->k) *
|
|
sizeof(struct hdcp2_streamid_type);
|
|
/* Send it to Repeater */
|
|
ret = shim->write_2_2_msg(dig_port, &msgs.stream_manage,
|
|
sizeof(msgs.stream_manage) - streams_size_delta);
|
|
if (ret < 0)
|
|
goto out;
|
|
|
|
ret = shim->read_2_2_msg(dig_port, HDCP_2_2_REP_STREAM_READY,
|
|
&msgs.stream_ready, sizeof(msgs.stream_ready));
|
|
if (ret < 0)
|
|
goto out;
|
|
|
|
data->seq_num_m = hdcp->seq_num_m;
|
|
|
|
ret = hdcp2_verify_mprime(connector, &msgs.stream_ready);
|
|
|
|
out:
|
|
hdcp->seq_num_m++;
|
|
|
|
return ret;
|
|
}
|
|
|
|
static
|
|
int hdcp2_authenticate_repeater_topology(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
union {
|
|
struct hdcp2_rep_send_receiverid_list recvid_list;
|
|
struct hdcp2_rep_send_ack rep_ack;
|
|
} msgs;
|
|
const struct intel_hdcp_shim *shim = hdcp->shim;
|
|
u32 seq_num_v, device_cnt;
|
|
u8 *rx_info;
|
|
int ret;
|
|
|
|
ret = shim->read_2_2_msg(dig_port, HDCP_2_2_REP_SEND_RECVID_LIST,
|
|
&msgs.recvid_list, sizeof(msgs.recvid_list));
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
rx_info = msgs.recvid_list.rx_info;
|
|
|
|
if (HDCP_2_2_MAX_CASCADE_EXCEEDED(rx_info[1]) ||
|
|
HDCP_2_2_MAX_DEVS_EXCEEDED(rx_info[1])) {
|
|
drm_dbg_kms(&dev_priv->drm, "Topology Max Size Exceeded\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
/*
|
|
* MST topology is not Type 1 capable if it contains a downstream
|
|
* device that is only HDCP 1.x or Legacy HDCP 2.0/2.1 compliant.
|
|
*/
|
|
dig_port->hdcp_mst_type1_capable =
|
|
!HDCP_2_2_HDCP1_DEVICE_CONNECTED(rx_info[1]) &&
|
|
!HDCP_2_2_HDCP_2_0_REP_CONNECTED(rx_info[1]);
|
|
|
|
/* Converting and Storing the seq_num_v to local variable as DWORD */
|
|
seq_num_v =
|
|
drm_hdcp_be24_to_cpu((const u8 *)msgs.recvid_list.seq_num_v);
|
|
|
|
if (!hdcp->hdcp2_encrypted && seq_num_v) {
|
|
drm_dbg_kms(&dev_priv->drm,
|
|
"Non zero Seq_num_v at first RecvId_List msg\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (seq_num_v < hdcp->seq_num_v) {
|
|
/* Roll over of the seq_num_v from repeater. Reauthenticate. */
|
|
drm_dbg_kms(&dev_priv->drm, "Seq_num_v roll over.\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
device_cnt = (HDCP_2_2_DEV_COUNT_HI(rx_info[0]) << 4 |
|
|
HDCP_2_2_DEV_COUNT_LO(rx_info[1]));
|
|
if (drm_hdcp_check_ksvs_revoked(&dev_priv->drm,
|
|
msgs.recvid_list.receiver_ids,
|
|
device_cnt) > 0) {
|
|
drm_err(&dev_priv->drm, "Revoked receiver ID(s) is in list\n");
|
|
return -EPERM;
|
|
}
|
|
|
|
ret = hdcp2_verify_rep_topology_prepare_ack(connector,
|
|
&msgs.recvid_list,
|
|
&msgs.rep_ack);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
hdcp->seq_num_v = seq_num_v;
|
|
ret = shim->write_2_2_msg(dig_port, &msgs.rep_ack,
|
|
sizeof(msgs.rep_ack));
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int hdcp2_authenticate_sink(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct drm_i915_private *i915 = to_i915(connector->base.dev);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
const struct intel_hdcp_shim *shim = hdcp->shim;
|
|
int ret;
|
|
|
|
ret = hdcp2_authentication_key_exchange(connector);
|
|
if (ret < 0) {
|
|
drm_dbg_kms(&i915->drm, "AKE Failed. Err : %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = hdcp2_locality_check(connector);
|
|
if (ret < 0) {
|
|
drm_dbg_kms(&i915->drm,
|
|
"Locality Check failed. Err : %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = hdcp2_session_key_exchange(connector);
|
|
if (ret < 0) {
|
|
drm_dbg_kms(&i915->drm, "SKE Failed. Err : %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
if (shim->config_stream_type) {
|
|
ret = shim->config_stream_type(dig_port,
|
|
hdcp->is_repeater,
|
|
hdcp->content_type);
|
|
if (ret < 0)
|
|
return ret;
|
|
}
|
|
|
|
if (hdcp->is_repeater) {
|
|
ret = hdcp2_authenticate_repeater_topology(connector);
|
|
if (ret < 0) {
|
|
drm_dbg_kms(&i915->drm,
|
|
"Repeater Auth Failed. Err: %d\n", ret);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int hdcp2_enable_stream_encryption(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
|
|
enum port port = dig_port->base.port;
|
|
int ret = 0;
|
|
|
|
if (!(intel_de_read(dev_priv, HDCP2_STATUS(dev_priv, cpu_transcoder, port)) &
|
|
LINK_ENCRYPTION_STATUS)) {
|
|
drm_err(&dev_priv->drm, "[%s:%d] HDCP 2.2 Link is not encrypted\n",
|
|
connector->base.name, connector->base.base.id);
|
|
ret = -EPERM;
|
|
goto link_recover;
|
|
}
|
|
|
|
if (hdcp->shim->stream_2_2_encryption) {
|
|
ret = hdcp->shim->stream_2_2_encryption(connector, true);
|
|
if (ret) {
|
|
drm_err(&dev_priv->drm, "[%s:%d] Failed to enable HDCP 2.2 stream enc\n",
|
|
connector->base.name, connector->base.base.id);
|
|
return ret;
|
|
}
|
|
drm_dbg_kms(&dev_priv->drm, "HDCP 2.2 transcoder: %s stream encrypted\n",
|
|
transcoder_name(hdcp->stream_transcoder));
|
|
}
|
|
|
|
return 0;
|
|
|
|
link_recover:
|
|
if (hdcp2_deauthenticate_port(connector) < 0)
|
|
drm_dbg_kms(&dev_priv->drm, "Port deauth failed.\n");
|
|
|
|
dig_port->hdcp_auth_status = false;
|
|
data->k = 0;
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int hdcp2_enable_encryption(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
enum port port = dig_port->base.port;
|
|
enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
|
|
int ret;
|
|
|
|
drm_WARN_ON(&dev_priv->drm,
|
|
intel_de_read(dev_priv, HDCP2_STATUS(dev_priv, cpu_transcoder, port)) &
|
|
LINK_ENCRYPTION_STATUS);
|
|
if (hdcp->shim->toggle_signalling) {
|
|
ret = hdcp->shim->toggle_signalling(dig_port, cpu_transcoder,
|
|
true);
|
|
if (ret) {
|
|
drm_err(&dev_priv->drm,
|
|
"Failed to enable HDCP signalling. %d\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
if (intel_de_read(dev_priv, HDCP2_STATUS(dev_priv, cpu_transcoder, port)) &
|
|
LINK_AUTH_STATUS) {
|
|
/* Link is Authenticated. Now set for Encryption */
|
|
intel_de_write(dev_priv,
|
|
HDCP2_CTL(dev_priv, cpu_transcoder, port),
|
|
intel_de_read(dev_priv, HDCP2_CTL(dev_priv, cpu_transcoder, port)) | CTL_LINK_ENCRYPTION_REQ);
|
|
}
|
|
|
|
ret = intel_de_wait_for_set(dev_priv,
|
|
HDCP2_STATUS(dev_priv, cpu_transcoder,
|
|
port),
|
|
LINK_ENCRYPTION_STATUS,
|
|
HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
|
|
dig_port->hdcp_auth_status = true;
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int hdcp2_disable_encryption(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
enum port port = dig_port->base.port;
|
|
enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
|
|
int ret;
|
|
|
|
drm_WARN_ON(&dev_priv->drm, !(intel_de_read(dev_priv, HDCP2_STATUS(dev_priv, cpu_transcoder, port)) &
|
|
LINK_ENCRYPTION_STATUS));
|
|
|
|
intel_de_write(dev_priv, HDCP2_CTL(dev_priv, cpu_transcoder, port),
|
|
intel_de_read(dev_priv, HDCP2_CTL(dev_priv, cpu_transcoder, port)) & ~CTL_LINK_ENCRYPTION_REQ);
|
|
|
|
ret = intel_de_wait_for_clear(dev_priv,
|
|
HDCP2_STATUS(dev_priv, cpu_transcoder,
|
|
port),
|
|
LINK_ENCRYPTION_STATUS,
|
|
HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
|
|
if (ret == -ETIMEDOUT)
|
|
drm_dbg_kms(&dev_priv->drm, "Disable Encryption Timedout");
|
|
|
|
if (hdcp->shim->toggle_signalling) {
|
|
ret = hdcp->shim->toggle_signalling(dig_port, cpu_transcoder,
|
|
false);
|
|
if (ret) {
|
|
drm_err(&dev_priv->drm,
|
|
"Failed to disable HDCP signalling. %d\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
hdcp2_propagate_stream_management_info(struct intel_connector *connector)
|
|
{
|
|
struct drm_i915_private *i915 = to_i915(connector->base.dev);
|
|
int i, tries = 3, ret;
|
|
|
|
if (!connector->hdcp.is_repeater)
|
|
return 0;
|
|
|
|
for (i = 0; i < tries; i++) {
|
|
ret = _hdcp2_propagate_stream_management_info(connector);
|
|
if (!ret)
|
|
break;
|
|
|
|
/* Lets restart the auth incase of seq_num_m roll over */
|
|
if (connector->hdcp.seq_num_m > HDCP_2_2_SEQ_NUM_MAX) {
|
|
drm_dbg_kms(&i915->drm,
|
|
"seq_num_m roll over.(%d)\n", ret);
|
|
break;
|
|
}
|
|
|
|
drm_dbg_kms(&i915->drm,
|
|
"HDCP2 stream management %d of %d Failed.(%d)\n",
|
|
i + 1, tries, ret);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct drm_i915_private *i915 = to_i915(connector->base.dev);
|
|
int ret = 0, i, tries = 3;
|
|
|
|
for (i = 0; i < tries && !dig_port->hdcp_auth_status; i++) {
|
|
ret = hdcp2_authenticate_sink(connector);
|
|
if (!ret) {
|
|
ret = intel_hdcp_prepare_streams(connector);
|
|
if (ret) {
|
|
drm_dbg_kms(&i915->drm,
|
|
"Prepare streams failed.(%d)\n",
|
|
ret);
|
|
break;
|
|
}
|
|
|
|
ret = hdcp2_propagate_stream_management_info(connector);
|
|
if (ret) {
|
|
drm_dbg_kms(&i915->drm,
|
|
"Stream management failed.(%d)\n",
|
|
ret);
|
|
break;
|
|
}
|
|
|
|
ret = hdcp2_authenticate_port(connector);
|
|
if (!ret)
|
|
break;
|
|
drm_dbg_kms(&i915->drm, "HDCP2 port auth failed.(%d)\n",
|
|
ret);
|
|
}
|
|
|
|
/* Clearing the mei hdcp session */
|
|
drm_dbg_kms(&i915->drm, "HDCP2.2 Auth %d of %d Failed.(%d)\n",
|
|
i + 1, tries, ret);
|
|
if (hdcp2_deauthenticate_port(connector) < 0)
|
|
drm_dbg_kms(&i915->drm, "Port deauth failed.\n");
|
|
}
|
|
|
|
if (!ret && !dig_port->hdcp_auth_status) {
|
|
/*
|
|
* Ensuring the required 200mSec min time interval between
|
|
* Session Key Exchange and encryption.
|
|
*/
|
|
msleep(HDCP_2_2_DELAY_BEFORE_ENCRYPTION_EN);
|
|
ret = hdcp2_enable_encryption(connector);
|
|
if (ret < 0) {
|
|
drm_dbg_kms(&i915->drm,
|
|
"Encryption Enable Failed.(%d)\n", ret);
|
|
if (hdcp2_deauthenticate_port(connector) < 0)
|
|
drm_dbg_kms(&i915->drm, "Port deauth failed.\n");
|
|
}
|
|
}
|
|
|
|
if (!ret)
|
|
ret = hdcp2_enable_stream_encryption(connector);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int _intel_hdcp2_enable(struct intel_connector *connector)
|
|
{
|
|
struct drm_i915_private *i915 = to_i915(connector->base.dev);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
int ret;
|
|
|
|
drm_dbg_kms(&i915->drm, "[%s:%d] HDCP2.2 is being enabled. Type: %d\n",
|
|
connector->base.name, connector->base.base.id,
|
|
hdcp->content_type);
|
|
|
|
ret = hdcp2_authenticate_and_encrypt(connector);
|
|
if (ret) {
|
|
drm_dbg_kms(&i915->drm, "HDCP2 Type%d Enabling Failed. (%d)\n",
|
|
hdcp->content_type, ret);
|
|
return ret;
|
|
}
|
|
|
|
drm_dbg_kms(&i915->drm, "[%s:%d] HDCP2.2 is enabled. Type %d\n",
|
|
connector->base.name, connector->base.base.id,
|
|
hdcp->content_type);
|
|
|
|
hdcp->hdcp2_encrypted = true;
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
_intel_hdcp2_disable(struct intel_connector *connector, bool hdcp2_link_recovery)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct drm_i915_private *i915 = to_i915(connector->base.dev);
|
|
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
int ret;
|
|
|
|
drm_dbg_kms(&i915->drm, "[%s:%d] HDCP2.2 is being Disabled\n",
|
|
connector->base.name, connector->base.base.id);
|
|
|
|
if (hdcp->shim->stream_2_2_encryption) {
|
|
ret = hdcp->shim->stream_2_2_encryption(connector, false);
|
|
if (ret) {
|
|
drm_err(&i915->drm, "[%s:%d] Failed to disable HDCP 2.2 stream enc\n",
|
|
connector->base.name, connector->base.base.id);
|
|
return ret;
|
|
}
|
|
drm_dbg_kms(&i915->drm, "HDCP 2.2 transcoder: %s stream encryption disabled\n",
|
|
transcoder_name(hdcp->stream_transcoder));
|
|
|
|
if (dig_port->num_hdcp_streams > 0 && !hdcp2_link_recovery)
|
|
return 0;
|
|
}
|
|
|
|
ret = hdcp2_disable_encryption(connector);
|
|
|
|
if (hdcp2_deauthenticate_port(connector) < 0)
|
|
drm_dbg_kms(&i915->drm, "Port deauth failed.\n");
|
|
|
|
connector->hdcp.hdcp2_encrypted = false;
|
|
dig_port->hdcp_auth_status = false;
|
|
data->k = 0;
|
|
|
|
return ret;
|
|
}
|
|
|
|
/* Implements the Link Integrity Check for HDCP2.2 */
|
|
static int intel_hdcp2_check_link(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
enum port port = dig_port->base.port;
|
|
enum transcoder cpu_transcoder;
|
|
int ret = 0;
|
|
|
|
mutex_lock(&hdcp->mutex);
|
|
mutex_lock(&dig_port->hdcp_mutex);
|
|
cpu_transcoder = hdcp->cpu_transcoder;
|
|
|
|
/* hdcp2_check_link is expected only when HDCP2.2 is Enabled */
|
|
if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||
|
|
!hdcp->hdcp2_encrypted) {
|
|
ret = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
if (drm_WARN_ON(&dev_priv->drm,
|
|
!intel_hdcp2_in_use(dev_priv, cpu_transcoder, port))) {
|
|
drm_err(&dev_priv->drm,
|
|
"HDCP2.2 link stopped the encryption, %x\n",
|
|
intel_de_read(dev_priv, HDCP2_STATUS(dev_priv, cpu_transcoder, port)));
|
|
ret = -ENXIO;
|
|
_intel_hdcp2_disable(connector, true);
|
|
intel_hdcp_update_value(connector,
|
|
DRM_MODE_CONTENT_PROTECTION_DESIRED,
|
|
true);
|
|
goto out;
|
|
}
|
|
|
|
ret = hdcp->shim->check_2_2_link(dig_port, connector);
|
|
if (ret == HDCP_LINK_PROTECTED) {
|
|
if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
|
|
intel_hdcp_update_value(connector,
|
|
DRM_MODE_CONTENT_PROTECTION_ENABLED,
|
|
true);
|
|
}
|
|
goto out;
|
|
}
|
|
|
|
if (ret == HDCP_TOPOLOGY_CHANGE) {
|
|
if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
|
|
goto out;
|
|
|
|
drm_dbg_kms(&dev_priv->drm,
|
|
"HDCP2.2 Downstream topology change\n");
|
|
ret = hdcp2_authenticate_repeater_topology(connector);
|
|
if (!ret) {
|
|
intel_hdcp_update_value(connector,
|
|
DRM_MODE_CONTENT_PROTECTION_ENABLED,
|
|
true);
|
|
goto out;
|
|
}
|
|
drm_dbg_kms(&dev_priv->drm,
|
|
"[%s:%d] Repeater topology auth failed.(%d)\n",
|
|
connector->base.name, connector->base.base.id,
|
|
ret);
|
|
} else {
|
|
drm_dbg_kms(&dev_priv->drm,
|
|
"[%s:%d] HDCP2.2 link failed, retrying auth\n",
|
|
connector->base.name, connector->base.base.id);
|
|
}
|
|
|
|
ret = _intel_hdcp2_disable(connector, true);
|
|
if (ret) {
|
|
drm_err(&dev_priv->drm,
|
|
"[%s:%d] Failed to disable hdcp2.2 (%d)\n",
|
|
connector->base.name, connector->base.base.id, ret);
|
|
intel_hdcp_update_value(connector,
|
|
DRM_MODE_CONTENT_PROTECTION_DESIRED, true);
|
|
goto out;
|
|
}
|
|
|
|
ret = _intel_hdcp2_enable(connector);
|
|
if (ret) {
|
|
drm_dbg_kms(&dev_priv->drm,
|
|
"[%s:%d] Failed to enable hdcp2.2 (%d)\n",
|
|
connector->base.name, connector->base.base.id,
|
|
ret);
|
|
intel_hdcp_update_value(connector,
|
|
DRM_MODE_CONTENT_PROTECTION_DESIRED,
|
|
true);
|
|
goto out;
|
|
}
|
|
|
|
out:
|
|
mutex_unlock(&dig_port->hdcp_mutex);
|
|
mutex_unlock(&hdcp->mutex);
|
|
return ret;
|
|
}
|
|
|
|
static void intel_hdcp_check_work(struct work_struct *work)
|
|
{
|
|
struct intel_hdcp *hdcp = container_of(to_delayed_work(work),
|
|
struct intel_hdcp,
|
|
check_work);
|
|
struct intel_connector *connector = intel_hdcp_to_connector(hdcp);
|
|
|
|
if (drm_connector_is_unregistered(&connector->base))
|
|
return;
|
|
|
|
if (!intel_hdcp2_check_link(connector))
|
|
schedule_delayed_work(&hdcp->check_work,
|
|
DRM_HDCP2_CHECK_PERIOD_MS);
|
|
else if (!intel_hdcp_check_link(connector))
|
|
schedule_delayed_work(&hdcp->check_work,
|
|
DRM_HDCP_CHECK_PERIOD_MS);
|
|
}
|
|
|
|
static int i915_hdcp_component_bind(struct device *i915_kdev,
|
|
struct device *mei_kdev, void *data)
|
|
{
|
|
struct drm_i915_private *dev_priv = kdev_to_i915(i915_kdev);
|
|
|
|
drm_dbg(&dev_priv->drm, "I915 HDCP comp bind\n");
|
|
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
|
|
dev_priv->display.hdcp.master = (struct i915_hdcp_comp_master *)data;
|
|
dev_priv->display.hdcp.master->mei_dev = mei_kdev;
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void i915_hdcp_component_unbind(struct device *i915_kdev,
|
|
struct device *mei_kdev, void *data)
|
|
{
|
|
struct drm_i915_private *dev_priv = kdev_to_i915(i915_kdev);
|
|
|
|
drm_dbg(&dev_priv->drm, "I915 HDCP comp unbind\n");
|
|
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
|
|
dev_priv->display.hdcp.master = NULL;
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
}
|
|
|
|
static const struct component_ops i915_hdcp_component_ops = {
|
|
.bind = i915_hdcp_component_bind,
|
|
.unbind = i915_hdcp_component_unbind,
|
|
};
|
|
|
|
static enum mei_fw_ddi intel_get_mei_fw_ddi_index(enum port port)
|
|
{
|
|
switch (port) {
|
|
case PORT_A:
|
|
return MEI_DDI_A;
|
|
case PORT_B ... PORT_F:
|
|
return (enum mei_fw_ddi)port;
|
|
default:
|
|
return MEI_DDI_INVALID_PORT;
|
|
}
|
|
}
|
|
|
|
static enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder)
|
|
{
|
|
switch (cpu_transcoder) {
|
|
case TRANSCODER_A ... TRANSCODER_D:
|
|
return (enum mei_fw_tc)(cpu_transcoder | 0x10);
|
|
default: /* eDP, DSI TRANSCODERS are non HDCP capable */
|
|
return MEI_INVALID_TRANSCODER;
|
|
}
|
|
}
|
|
|
|
static int initialize_hdcp_port_data(struct intel_connector *connector,
|
|
struct intel_digital_port *dig_port,
|
|
const struct intel_hdcp_shim *shim)
|
|
{
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
enum port port = dig_port->base.port;
|
|
|
|
if (DISPLAY_VER(dev_priv) < 12)
|
|
data->fw_ddi = intel_get_mei_fw_ddi_index(port);
|
|
else
|
|
/*
|
|
* As per ME FW API expectation, for GEN 12+, fw_ddi is filled
|
|
* with zero(INVALID PORT index).
|
|
*/
|
|
data->fw_ddi = MEI_DDI_INVALID_PORT;
|
|
|
|
/*
|
|
* As associated transcoder is set and modified at modeset, here fw_tc
|
|
* is initialized to zero (invalid transcoder index). This will be
|
|
* retained for <Gen12 forever.
|
|
*/
|
|
data->fw_tc = MEI_INVALID_TRANSCODER;
|
|
|
|
data->port_type = (u8)HDCP_PORT_TYPE_INTEGRATED;
|
|
data->protocol = (u8)shim->protocol;
|
|
|
|
if (!data->streams)
|
|
data->streams = kcalloc(INTEL_NUM_PIPES(dev_priv),
|
|
sizeof(struct hdcp2_streamid_type),
|
|
GFP_KERNEL);
|
|
if (!data->streams) {
|
|
drm_err(&dev_priv->drm, "Out of Memory\n");
|
|
return -ENOMEM;
|
|
}
|
|
/* For SST */
|
|
data->streams[0].stream_id = 0;
|
|
data->streams[0].stream_type = hdcp->content_type;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static bool is_hdcp2_supported(struct drm_i915_private *dev_priv)
|
|
{
|
|
if (!IS_ENABLED(CONFIG_INTEL_MEI_HDCP))
|
|
return false;
|
|
|
|
return (DISPLAY_VER(dev_priv) >= 10 ||
|
|
IS_KABYLAKE(dev_priv) ||
|
|
IS_COFFEELAKE(dev_priv) ||
|
|
IS_COMETLAKE(dev_priv));
|
|
}
|
|
|
|
void intel_hdcp_component_init(struct drm_i915_private *dev_priv)
|
|
{
|
|
int ret;
|
|
|
|
if (!is_hdcp2_supported(dev_priv))
|
|
return;
|
|
|
|
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
|
|
drm_WARN_ON(&dev_priv->drm, dev_priv->display.hdcp.comp_added);
|
|
|
|
dev_priv->display.hdcp.comp_added = true;
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
ret = component_add_typed(dev_priv->drm.dev, &i915_hdcp_component_ops,
|
|
I915_COMPONENT_HDCP);
|
|
if (ret < 0) {
|
|
drm_dbg_kms(&dev_priv->drm, "Failed at component add(%d)\n",
|
|
ret);
|
|
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
|
|
dev_priv->display.hdcp.comp_added = false;
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
return;
|
|
}
|
|
}
|
|
|
|
static void intel_hdcp2_init(struct intel_connector *connector,
|
|
struct intel_digital_port *dig_port,
|
|
const struct intel_hdcp_shim *shim)
|
|
{
|
|
struct drm_i915_private *i915 = to_i915(connector->base.dev);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
int ret;
|
|
|
|
ret = initialize_hdcp_port_data(connector, dig_port, shim);
|
|
if (ret) {
|
|
drm_dbg_kms(&i915->drm, "Mei hdcp data init failed\n");
|
|
return;
|
|
}
|
|
|
|
hdcp->hdcp2_supported = true;
|
|
}
|
|
|
|
int intel_hdcp_init(struct intel_connector *connector,
|
|
struct intel_digital_port *dig_port,
|
|
const struct intel_hdcp_shim *shim)
|
|
{
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
int ret;
|
|
|
|
if (!shim)
|
|
return -EINVAL;
|
|
|
|
if (is_hdcp2_supported(dev_priv))
|
|
intel_hdcp2_init(connector, dig_port, shim);
|
|
|
|
ret =
|
|
drm_connector_attach_content_protection_property(&connector->base,
|
|
hdcp->hdcp2_supported);
|
|
if (ret) {
|
|
hdcp->hdcp2_supported = false;
|
|
kfree(dig_port->hdcp_port_data.streams);
|
|
return ret;
|
|
}
|
|
|
|
hdcp->shim = shim;
|
|
mutex_init(&hdcp->mutex);
|
|
INIT_DELAYED_WORK(&hdcp->check_work, intel_hdcp_check_work);
|
|
INIT_WORK(&hdcp->prop_work, intel_hdcp_prop_work);
|
|
init_waitqueue_head(&hdcp->cp_irq_queue);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int intel_hdcp_enable(struct intel_connector *connector,
|
|
const struct intel_crtc_state *pipe_config, u8 content_type)
|
|
{
|
|
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
unsigned long check_link_interval = DRM_HDCP_CHECK_PERIOD_MS;
|
|
int ret = -EINVAL;
|
|
|
|
if (!hdcp->shim)
|
|
return -ENOENT;
|
|
|
|
if (!connector->encoder) {
|
|
drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n",
|
|
connector->base.name, connector->base.base.id);
|
|
return -ENODEV;
|
|
}
|
|
|
|
mutex_lock(&hdcp->mutex);
|
|
mutex_lock(&dig_port->hdcp_mutex);
|
|
drm_WARN_ON(&dev_priv->drm,
|
|
hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED);
|
|
hdcp->content_type = content_type;
|
|
|
|
if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) {
|
|
hdcp->cpu_transcoder = pipe_config->mst_master_transcoder;
|
|
hdcp->stream_transcoder = pipe_config->cpu_transcoder;
|
|
} else {
|
|
hdcp->cpu_transcoder = pipe_config->cpu_transcoder;
|
|
hdcp->stream_transcoder = INVALID_TRANSCODER;
|
|
}
|
|
|
|
if (DISPLAY_VER(dev_priv) >= 12)
|
|
dig_port->hdcp_port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder);
|
|
|
|
/*
|
|
* Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
|
|
* is capable of HDCP2.2, it is preferred to use HDCP2.2.
|
|
*/
|
|
if (intel_hdcp2_capable(connector)) {
|
|
ret = _intel_hdcp2_enable(connector);
|
|
if (!ret)
|
|
check_link_interval = DRM_HDCP2_CHECK_PERIOD_MS;
|
|
}
|
|
|
|
/*
|
|
* When HDCP2.2 fails and Content Type is not Type1, HDCP1.4 will
|
|
* be attempted.
|
|
*/
|
|
if (ret && intel_hdcp_capable(connector) &&
|
|
hdcp->content_type != DRM_MODE_HDCP_CONTENT_TYPE1) {
|
|
ret = _intel_hdcp_enable(connector);
|
|
}
|
|
|
|
if (!ret) {
|
|
schedule_delayed_work(&hdcp->check_work, check_link_interval);
|
|
intel_hdcp_update_value(connector,
|
|
DRM_MODE_CONTENT_PROTECTION_ENABLED,
|
|
true);
|
|
}
|
|
|
|
mutex_unlock(&dig_port->hdcp_mutex);
|
|
mutex_unlock(&hdcp->mutex);
|
|
return ret;
|
|
}
|
|
|
|
int intel_hdcp_disable(struct intel_connector *connector)
|
|
{
|
|
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
int ret = 0;
|
|
|
|
if (!hdcp->shim)
|
|
return -ENOENT;
|
|
|
|
mutex_lock(&hdcp->mutex);
|
|
mutex_lock(&dig_port->hdcp_mutex);
|
|
|
|
if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
|
|
goto out;
|
|
|
|
intel_hdcp_update_value(connector,
|
|
DRM_MODE_CONTENT_PROTECTION_UNDESIRED, false);
|
|
if (hdcp->hdcp2_encrypted)
|
|
ret = _intel_hdcp2_disable(connector, false);
|
|
else if (hdcp->hdcp_encrypted)
|
|
ret = _intel_hdcp_disable(connector);
|
|
|
|
out:
|
|
mutex_unlock(&dig_port->hdcp_mutex);
|
|
mutex_unlock(&hdcp->mutex);
|
|
cancel_delayed_work_sync(&hdcp->check_work);
|
|
return ret;
|
|
}
|
|
|
|
void intel_hdcp_update_pipe(struct intel_atomic_state *state,
|
|
struct intel_encoder *encoder,
|
|
const struct intel_crtc_state *crtc_state,
|
|
const struct drm_connector_state *conn_state)
|
|
{
|
|
struct intel_connector *connector =
|
|
to_intel_connector(conn_state->connector);
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
bool content_protection_type_changed, desired_and_not_enabled = false;
|
|
|
|
if (!connector->hdcp.shim)
|
|
return;
|
|
|
|
content_protection_type_changed =
|
|
(conn_state->hdcp_content_type != hdcp->content_type &&
|
|
conn_state->content_protection !=
|
|
DRM_MODE_CONTENT_PROTECTION_UNDESIRED);
|
|
|
|
/*
|
|
* During the HDCP encryption session if Type change is requested,
|
|
* disable the HDCP and reenable it with new TYPE value.
|
|
*/
|
|
if (conn_state->content_protection ==
|
|
DRM_MODE_CONTENT_PROTECTION_UNDESIRED ||
|
|
content_protection_type_changed)
|
|
intel_hdcp_disable(connector);
|
|
|
|
/*
|
|
* Mark the hdcp state as DESIRED after the hdcp disable of type
|
|
* change procedure.
|
|
*/
|
|
if (content_protection_type_changed) {
|
|
mutex_lock(&hdcp->mutex);
|
|
hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
|
|
drm_connector_get(&connector->base);
|
|
schedule_work(&hdcp->prop_work);
|
|
mutex_unlock(&hdcp->mutex);
|
|
}
|
|
|
|
if (conn_state->content_protection ==
|
|
DRM_MODE_CONTENT_PROTECTION_DESIRED) {
|
|
mutex_lock(&hdcp->mutex);
|
|
/* Avoid enabling hdcp, if it already ENABLED */
|
|
desired_and_not_enabled =
|
|
hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED;
|
|
mutex_unlock(&hdcp->mutex);
|
|
/*
|
|
* If HDCP already ENABLED and CP property is DESIRED, schedule
|
|
* prop_work to update correct CP property to user space.
|
|
*/
|
|
if (!desired_and_not_enabled && !content_protection_type_changed) {
|
|
drm_connector_get(&connector->base);
|
|
schedule_work(&hdcp->prop_work);
|
|
}
|
|
}
|
|
|
|
if (desired_and_not_enabled || content_protection_type_changed)
|
|
intel_hdcp_enable(connector,
|
|
crtc_state,
|
|
(u8)conn_state->hdcp_content_type);
|
|
}
|
|
|
|
void intel_hdcp_component_fini(struct drm_i915_private *dev_priv)
|
|
{
|
|
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
|
|
if (!dev_priv->display.hdcp.comp_added) {
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
return;
|
|
}
|
|
|
|
dev_priv->display.hdcp.comp_added = false;
|
|
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
|
|
|
|
component_del(dev_priv->drm.dev, &i915_hdcp_component_ops);
|
|
}
|
|
|
|
void intel_hdcp_cleanup(struct intel_connector *connector)
|
|
{
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
|
|
if (!hdcp->shim)
|
|
return;
|
|
|
|
/*
|
|
* If the connector is registered, it's possible userspace could kick
|
|
* off another HDCP enable, which would re-spawn the workers.
|
|
*/
|
|
drm_WARN_ON(connector->base.dev,
|
|
connector->base.registration_state == DRM_CONNECTOR_REGISTERED);
|
|
|
|
/*
|
|
* Now that the connector is not registered, check_work won't be run,
|
|
* but cancel any outstanding instances of it
|
|
*/
|
|
cancel_delayed_work_sync(&hdcp->check_work);
|
|
|
|
/*
|
|
* We don't cancel prop_work in the same way as check_work since it
|
|
* requires connection_mutex which could be held while calling this
|
|
* function. Instead, we rely on the connector references grabbed before
|
|
* scheduling prop_work to ensure the connector is alive when prop_work
|
|
* is run. So if we're in the destroy path (which is where this
|
|
* function should be called), we're "guaranteed" that prop_work is not
|
|
* active (tl;dr This Should Never Happen).
|
|
*/
|
|
drm_WARN_ON(connector->base.dev, work_pending(&hdcp->prop_work));
|
|
|
|
mutex_lock(&hdcp->mutex);
|
|
hdcp->shim = NULL;
|
|
mutex_unlock(&hdcp->mutex);
|
|
}
|
|
|
|
void intel_hdcp_atomic_check(struct drm_connector *connector,
|
|
struct drm_connector_state *old_state,
|
|
struct drm_connector_state *new_state)
|
|
{
|
|
u64 old_cp = old_state->content_protection;
|
|
u64 new_cp = new_state->content_protection;
|
|
struct drm_crtc_state *crtc_state;
|
|
|
|
if (!new_state->crtc) {
|
|
/*
|
|
* If the connector is being disabled with CP enabled, mark it
|
|
* desired so it's re-enabled when the connector is brought back
|
|
*/
|
|
if (old_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED)
|
|
new_state->content_protection =
|
|
DRM_MODE_CONTENT_PROTECTION_DESIRED;
|
|
return;
|
|
}
|
|
|
|
crtc_state = drm_atomic_get_new_crtc_state(new_state->state,
|
|
new_state->crtc);
|
|
/*
|
|
* Fix the HDCP uapi content protection state in case of modeset.
|
|
* FIXME: As per HDCP content protection property uapi doc, an uevent()
|
|
* need to be sent if there is transition from ENABLED->DESIRED.
|
|
*/
|
|
if (drm_atomic_crtc_needs_modeset(crtc_state) &&
|
|
(old_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED &&
|
|
new_cp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED))
|
|
new_state->content_protection =
|
|
DRM_MODE_CONTENT_PROTECTION_DESIRED;
|
|
|
|
/*
|
|
* Nothing to do if the state didn't change, or HDCP was activated since
|
|
* the last commit. And also no change in hdcp content type.
|
|
*/
|
|
if (old_cp == new_cp ||
|
|
(old_cp == DRM_MODE_CONTENT_PROTECTION_DESIRED &&
|
|
new_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED)) {
|
|
if (old_state->hdcp_content_type ==
|
|
new_state->hdcp_content_type)
|
|
return;
|
|
}
|
|
|
|
crtc_state->mode_changed = true;
|
|
}
|
|
|
|
/* Handles the CP_IRQ raised from the DP HDCP sink */
|
|
void intel_hdcp_handle_cp_irq(struct intel_connector *connector)
|
|
{
|
|
struct intel_hdcp *hdcp = &connector->hdcp;
|
|
|
|
if (!hdcp->shim)
|
|
return;
|
|
|
|
atomic_inc(&connector->hdcp.cp_irq_count);
|
|
wake_up_all(&connector->hdcp.cp_irq_queue);
|
|
|
|
schedule_delayed_work(&hdcp->check_work, 0);
|
|
}
|