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![]() usual suspects are here: i.MX, Qualcomm, Renesas, Allwinner, Samsung, and Rockchip, but it feels pretty light on commits. There's only one real commit to the framework core and that's to consolidate code. Otherwise the diffstat is dominated by many Qualcomm clk driver patches that modernize the driver for the proper way of speciying clk parents. That's shifting data around, which could subtly break things so I'll be on the lookout for fixes. New Drivers: - Proper clk driver for Mediatek MT7621 SoCs - Support for the clock controller on the new Rockchip rk3568 Updates: - Simplify Zynq Kconfig dependencies - Use clk_hw pointers in socfpga driver - Cleanup parent data in qcom clk drivers - Some cleanups for rk3399 modularization - Fix reparenting of i.MX UART clocks by initializing only the ones associated to stdout - Correct the PCIE clocks for i.MX8MP and i.MX8MQ - Make i.MX LPCG and SCU clocks return on registering failure - Kernel doc fixes - Add DAB hardware accelerator clocks on Renesas R-Car E3 and M3-N - Add timer (TMU) clocks on Renesas R-Car H3 ES1.0 - Add Timer (TMU & CMT) and thermal sensor (TSC) clocks on Renesas R-Car V3U - Sigma-delta modulation on Allwinner V3s audio PLL -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmCJ9PcRHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSXEFhAAuWMm47mZjE4TG+6qizcGC7kEDwS9Rs+j 0oYzdWBmSn7vGBZCCdr/IgvjK3CviNDXE076w5ntZm5kajD3yUOBNkFpHxOa9la7 NuH+OJiJQfzfzwFPwQmMZ0TjeaPDLqXcneKC80nYnauo7HScnySdiLdAmEnzJn7v 3a6Jf0Wzv1QIMZxdX3HgHts/VcWwonNJ1IGPUl5Ac7tJgUKLi+l1R27dow9eCH83 7KPFXjCsiE9jwIBvEUEvxguz5SPQujSHc81cLp8FnIsY7YsTx48NaHQrpcqQM8f8 zliC29QIjvWr8BGMKcHmuDwEG68gDdjHzmaKJSbcVTZ/jikQu+lOMNX96HRSdNe1 48UTk8Gqwyj9xI4OGC8A2ssLCGvDivSpdEfYoH7hE3K/+dxjwita9ZGIiD7Zp7C+ omjVGIUeSqoyQBXINC3sVwR+8nqCyR6ceRTxeELa8XwjPLwVg2JGPvJCKLHr5RED TXtt3SYCcoKbdxqrBwOsMx1dhWvkx2f0iAKyUKt8jbAIE+bNwbqGOnWMaqiM+j8r ixG8WL59087XYBjeO7kwn16Gszf5EkZWRTsA27tHni4hDUFp1ZpPRUJwvHgT1S5v o1Tvo5AmtvT9HMasPa5cqlQh7FOrRb2FPXxaQRFR8VX6GQanWf9N+MP3THwRSNVn 2oadQvAJm/w= =z+1G -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "Here's a collection of largely clk driver updates. The usual suspects are here: i.MX, Qualcomm, Renesas, Allwinner, Samsung, and Rockchip, but it feels pretty light on commits. There's only one real commit to the framework core and that's to consolidate code. Otherwise the diffstat is dominated by many Qualcomm clk driver patches that modernize the driver for the proper way of speciying clk parents. That's shifting data around, which could subtly break things so I'll be on the lookout for fixes. New Drivers: - Proper clk driver for Mediatek MT7621 SoCs - Support for the clock controller on the new Rockchip rk3568 Updates: - Simplify Zynq Kconfig dependencies - Use clk_hw pointers in socfpga driver - Cleanup parent data in qcom clk drivers - Some cleanups for rk3399 modularization - Fix reparenting of i.MX UART clocks by initializing only the ones associated to stdout - Correct the PCIE clocks for i.MX8MP and i.MX8MQ - Make i.MX LPCG and SCU clocks return on registering failure - Kernel doc fixes - Add DAB hardware accelerator clocks on Renesas R-Car E3 and M3-N - Add timer (TMU) clocks on Renesas R-Car H3 ES1.0 - Add Timer (TMU & CMT) and thermal sensor (TSC) clocks on Renesas R-Car V3U - Sigma-delta modulation on Allwinner V3s audio PLL" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (82 commits) MAINTAINERS: add MT7621 CLOCK maintainer staging: mt7621-dts: use valid vendor 'mediatek' instead of invalid 'mtk' staging: mt7621-dts: make use of new 'mt7621-clk' clk: ralink: add clock driver for mt7621 SoC clk: uniphier: Fix potential infinite loop clk: qcom: rpmh: add support for SDX55 rpmh IPA clock clk: qcom: gcc-sdm845: get rid of the test clock clk: qcom: convert SDM845 Global Clock Controller to parent_data dt-bindings: clock: separate SDM845 GCC clock bindings clk: qcom: apss-ipq-pll: Add missing MODULE_DEVICE_TABLE clk: qcom: a53-pll: Add missing MODULE_DEVICE_TABLE clk: qcom: a7-pll: Add missing MODULE_DEVICE_TABLE dt: bindings: add mt7621-sysc device tree binding documentation dt-bindings: clock: add dt binding header for mt7621 clocks clk: samsung: Remove redundant dev_err calls clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enable clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callback clk: zynqmp: Drop dependency on ARCH_ZYNQMP clk: zynqmp: Enable the driver if ZYNQMP_FIRMWARE is selected clk: qcom: gcc-sm8350: use ARRAY_SIZE instead of specifying num_parents ... |
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.. | ||
clk-agilex.c | ||
clk-gate-a10.c | ||
clk-gate-s10.c | ||
clk-gate.c | ||
clk-periph-a10.c | ||
clk-periph-s10.c | ||
clk-periph.c | ||
clk-pll-a10.c | ||
clk-pll-s10.c | ||
clk-pll.c | ||
clk-s10.c | ||
clk.c | ||
clk.h | ||
Kconfig | ||
Makefile | ||
stratix10-clk.h |