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![Sai Krishna Potthuri](/assets/img/avatar_default.png)
Adding pinctrl driver for Xilinx ZynqMP platform. This driver queries pin information from firmware and registers pin control accordingly. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Link: https://lore.kernel.org/r/1619080202-31924-4-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
906 lines
22 KiB
C
906 lines
22 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* ZynqMP pin controller
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*
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* Copyright (C) 2020 Xilinx, Inc.
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*
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* Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
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* Rajan Vaja <rajan.vaja@xilinx.com>
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*/
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#include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/firmware/xlnx-zynqmp.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include "core.h"
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#include "pinctrl-utils.h"
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#define ZYNQMP_PIN_PREFIX "MIO"
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#define PINCTRL_GET_FUNC_NAME_RESP_LEN 16
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#define MAX_FUNC_NAME_LEN 16
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#define MAX_GROUP_PIN 50
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#define MAX_PIN_GROUPS 50
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#define END_OF_FUNCTIONS "END_OF_FUNCTIONS"
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#define NUM_GROUPS_PER_RESP 6
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#define PINCTRL_GET_FUNC_GROUPS_RESP_LEN 12
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#define PINCTRL_GET_PIN_GROUPS_RESP_LEN 12
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#define NA_GROUP 0xFFFF
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#define RESERVED_GROUP 0xFFFE
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#define DRIVE_STRENGTH_2MA 2
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#define DRIVE_STRENGTH_4MA 4
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#define DRIVE_STRENGTH_8MA 8
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#define DRIVE_STRENGTH_12MA 12
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/**
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* struct zynqmp_pmux_function - a pinmux function
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* @name: Name of the pin mux function
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* @groups: List of pin groups for this function
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* @ngroups: Number of entries in @groups
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* @node: Firmware node matching with the function
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*
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* This structure holds information about pin control function
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* and function group names supporting that function.
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*/
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struct zynqmp_pmux_function {
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char name[MAX_FUNC_NAME_LEN];
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const char * const *groups;
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unsigned int ngroups;
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};
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/**
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* struct zynqmp_pinctrl - driver data
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* @pctrl: Pin control device
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* @groups: Pin groups
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* @ngroups: Number of @groups
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* @funcs: Pin mux functions
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* @nfuncs: Number of @funcs
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*
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* This struct is stored as driver data and used to retrieve
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* information regarding pin control functions, groups and
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* group pins.
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*/
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struct zynqmp_pinctrl {
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struct pinctrl_dev *pctrl;
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const struct zynqmp_pctrl_group *groups;
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unsigned int ngroups;
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const struct zynqmp_pmux_function *funcs;
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unsigned int nfuncs;
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};
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/**
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* struct zynqmp_pctrl_group - Pin control group info
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* @name: Group name
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* @pins: Group pin numbers
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* @npins: Number of pins in the group
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*/
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struct zynqmp_pctrl_group {
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const char *name;
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unsigned int pins[MAX_GROUP_PIN];
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unsigned int npins;
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};
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static struct pinctrl_desc zynqmp_desc;
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static int zynqmp_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
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return pctrl->ngroups;
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}
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static const char *zynqmp_pctrl_get_group_name(struct pinctrl_dev *pctldev,
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unsigned int selector)
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{
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struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
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return pctrl->groups[selector].name;
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}
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static int zynqmp_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
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unsigned int selector,
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const unsigned int **pins,
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unsigned int *npins)
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{
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struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
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*pins = pctrl->groups[selector].pins;
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*npins = pctrl->groups[selector].npins;
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return 0;
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}
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static const struct pinctrl_ops zynqmp_pctrl_ops = {
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.get_groups_count = zynqmp_pctrl_get_groups_count,
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.get_group_name = zynqmp_pctrl_get_group_name,
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.get_group_pins = zynqmp_pctrl_get_group_pins,
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.dt_node_to_map = pinconf_generic_dt_node_to_map_all,
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.dt_free_map = pinctrl_utils_free_map,
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};
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static int zynqmp_pinmux_request_pin(struct pinctrl_dev *pctldev,
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unsigned int pin)
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{
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int ret;
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ret = zynqmp_pm_pinctrl_request(pin);
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if (ret) {
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dev_err(pctldev->dev, "request failed for pin %u\n", pin);
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return ret;
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}
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return 0;
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}
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static int zynqmp_pmux_get_functions_count(struct pinctrl_dev *pctldev)
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{
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struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
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return pctrl->nfuncs;
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}
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static const char *zynqmp_pmux_get_function_name(struct pinctrl_dev *pctldev,
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unsigned int selector)
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{
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struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
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return pctrl->funcs[selector].name;
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}
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/**
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* zynqmp_pmux_get_function_groups() - Get groups for the function
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* @pctldev: Pincontrol device pointer.
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* @selector: Function ID
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* @groups: Group names.
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* @num_groups: Number of function groups.
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*
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* Get function's group count and group names.
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*/
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static int zynqmp_pmux_get_function_groups(struct pinctrl_dev *pctldev,
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unsigned int selector,
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const char * const **groups,
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unsigned * const num_groups)
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{
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struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
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*groups = pctrl->funcs[selector].groups;
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*num_groups = pctrl->funcs[selector].ngroups;
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return 0;
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}
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/**
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* zynqmp_pinmux_set_mux() - Set requested function for the group
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* @pctldev: Pincontrol device pointer.
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* @function: Function ID.
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* @group: Group ID.
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*
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* Loop through all pins of the group and call firmware API
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* to set requested function for all pins in the group.
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*
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* Return: 0 on success else error code.
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*/
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static int zynqmp_pinmux_set_mux(struct pinctrl_dev *pctldev,
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unsigned int function,
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unsigned int group)
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{
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struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
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const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[group];
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int ret, i;
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for (i = 0; i < pgrp->npins; i++) {
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unsigned int pin = pgrp->pins[i];
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ret = zynqmp_pm_pinctrl_set_function(pin, function);
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if (ret) {
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dev_err(pctldev->dev, "set mux failed for pin %u\n",
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pin);
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return ret;
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}
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}
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return 0;
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}
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static int zynqmp_pinmux_release_pin(struct pinctrl_dev *pctldev,
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unsigned int pin)
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{
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int ret;
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ret = zynqmp_pm_pinctrl_release(pin);
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if (ret) {
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dev_err(pctldev->dev, "free pin failed for pin %u\n",
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pin);
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return ret;
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}
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return 0;
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}
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static const struct pinmux_ops zynqmp_pinmux_ops = {
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.request = zynqmp_pinmux_request_pin,
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.get_functions_count = zynqmp_pmux_get_functions_count,
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.get_function_name = zynqmp_pmux_get_function_name,
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.get_function_groups = zynqmp_pmux_get_function_groups,
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.set_mux = zynqmp_pinmux_set_mux,
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.free = zynqmp_pinmux_release_pin,
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};
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/**
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* zynqmp_pinconf_cfg_get() - get config value for the pin
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* @pctldev: Pin control device pointer.
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* @pin: Pin number.
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* @config: Value of config param.
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*
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* Get value of the requested configuration parameter for the
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* given pin.
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*
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* Return: 0 on success else error code.
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*/
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static int zynqmp_pinconf_cfg_get(struct pinctrl_dev *pctldev,
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unsigned int pin,
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unsigned long *config)
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{
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unsigned int arg, param = pinconf_to_config_param(*config);
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int ret;
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if (pin >= zynqmp_desc.npins)
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return -EOPNOTSUPP;
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switch (param) {
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case PIN_CONFIG_SLEW_RATE:
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param = PM_PINCTRL_CONFIG_SLEW_RATE;
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ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
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break;
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case PIN_CONFIG_BIAS_PULL_UP:
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param = PM_PINCTRL_CONFIG_PULL_CTRL;
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ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
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if (arg != PM_PINCTRL_BIAS_PULL_UP)
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return -EINVAL;
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arg = 1;
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break;
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case PIN_CONFIG_BIAS_PULL_DOWN:
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param = PM_PINCTRL_CONFIG_PULL_CTRL;
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ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
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if (arg != PM_PINCTRL_BIAS_PULL_DOWN)
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return -EINVAL;
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arg = 1;
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break;
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case PIN_CONFIG_BIAS_DISABLE:
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param = PM_PINCTRL_CONFIG_BIAS_STATUS;
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ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
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if (arg != PM_PINCTRL_BIAS_DISABLE)
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return -EINVAL;
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arg = 1;
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break;
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case PIN_CONFIG_POWER_SOURCE:
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param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS;
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ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
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break;
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case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
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param = PM_PINCTRL_CONFIG_SCHMITT_CMOS;
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ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
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break;
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case PIN_CONFIG_DRIVE_STRENGTH:
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param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH;
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ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
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switch (arg) {
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case PM_PINCTRL_DRIVE_STRENGTH_2MA:
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arg = DRIVE_STRENGTH_2MA;
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break;
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case PM_PINCTRL_DRIVE_STRENGTH_4MA:
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arg = DRIVE_STRENGTH_4MA;
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break;
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case PM_PINCTRL_DRIVE_STRENGTH_8MA:
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arg = DRIVE_STRENGTH_8MA;
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break;
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case PM_PINCTRL_DRIVE_STRENGTH_12MA:
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arg = DRIVE_STRENGTH_12MA;
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break;
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default:
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/* Invalid drive strength */
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dev_warn(pctldev->dev,
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"Invalid drive strength for pin %d\n",
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pin);
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return -EINVAL;
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}
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break;
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default:
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ret = -EOPNOTSUPP;
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break;
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}
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if (ret)
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return ret;
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param = pinconf_to_config_param(*config);
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*config = pinconf_to_config_packed(param, arg);
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return 0;
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}
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/**
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* zynqmp_pinconf_cfg_set() - Set requested config for the pin
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* @pctldev: Pincontrol device pointer.
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* @pin: Pin number.
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* @configs: Configuration to set.
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* @num_configs: Number of configurations.
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*
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* Loop through all configurations and call firmware API
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* to set requested configurations for the pin.
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*
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* Return: 0 on success else error code.
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*/
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static int zynqmp_pinconf_cfg_set(struct pinctrl_dev *pctldev,
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unsigned int pin, unsigned long *configs,
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unsigned int num_configs)
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{
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int i, ret;
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if (pin >= zynqmp_desc.npins)
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return -EOPNOTSUPP;
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for (i = 0; i < num_configs; i++) {
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unsigned int param = pinconf_to_config_param(configs[i]);
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unsigned int arg = pinconf_to_config_argument(configs[i]);
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unsigned int value;
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switch (param) {
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case PIN_CONFIG_SLEW_RATE:
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param = PM_PINCTRL_CONFIG_SLEW_RATE;
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ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
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break;
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case PIN_CONFIG_BIAS_PULL_UP:
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param = PM_PINCTRL_CONFIG_PULL_CTRL;
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arg = PM_PINCTRL_BIAS_PULL_UP;
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ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
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break;
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case PIN_CONFIG_BIAS_PULL_DOWN:
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param = PM_PINCTRL_CONFIG_PULL_CTRL;
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arg = PM_PINCTRL_BIAS_PULL_DOWN;
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ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
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break;
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case PIN_CONFIG_BIAS_DISABLE:
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param = PM_PINCTRL_CONFIG_BIAS_STATUS;
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arg = PM_PINCTRL_BIAS_DISABLE;
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ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
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break;
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case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
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param = PM_PINCTRL_CONFIG_SCHMITT_CMOS;
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ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
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break;
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case PIN_CONFIG_DRIVE_STRENGTH:
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switch (arg) {
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case DRIVE_STRENGTH_2MA:
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value = PM_PINCTRL_DRIVE_STRENGTH_2MA;
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break;
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case DRIVE_STRENGTH_4MA:
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value = PM_PINCTRL_DRIVE_STRENGTH_4MA;
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break;
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case DRIVE_STRENGTH_8MA:
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value = PM_PINCTRL_DRIVE_STRENGTH_8MA;
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break;
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case DRIVE_STRENGTH_12MA:
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value = PM_PINCTRL_DRIVE_STRENGTH_12MA;
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break;
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default:
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/* Invalid drive strength */
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dev_warn(pctldev->dev,
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"Invalid drive strength for pin %d\n",
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pin);
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return -EINVAL;
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}
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param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH;
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ret = zynqmp_pm_pinctrl_set_config(pin, param, value);
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break;
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case PIN_CONFIG_POWER_SOURCE:
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param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS;
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ret = zynqmp_pm_pinctrl_get_config(pin, param, &value);
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if (arg != value)
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dev_warn(pctldev->dev,
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"Invalid IO Standard requested for pin %d\n",
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pin);
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break;
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case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
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case PIN_CONFIG_MODE_LOW_POWER:
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/*
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* These cases are mentioned in dts but configurable
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* registers are unknown. So falling through to ignore
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* boot time warnings as of now.
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*/
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ret = 0;
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break;
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default:
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dev_warn(pctldev->dev,
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"unsupported configuration parameter '%u'\n",
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param);
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ret = -EOPNOTSUPP;
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break;
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}
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param = pinconf_to_config_param(configs[i]);
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arg = pinconf_to_config_argument(configs[i]);
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if (ret)
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dev_warn(pctldev->dev,
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"failed to set: pin %u param %u value %u\n",
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pin, param, arg);
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}
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return 0;
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}
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/**
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* zynqmp_pinconf_group_set() - Set requested config for the group
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* @pctldev: Pincontrol device pointer.
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* @selector: Group ID.
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* @configs: Configuration to set.
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* @num_configs: Number of configurations.
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*
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* Call function to set configs for each pin in the group.
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*
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* Return: 0 on success else error code.
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*/
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static int zynqmp_pinconf_group_set(struct pinctrl_dev *pctldev,
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unsigned int selector,
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unsigned long *configs,
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unsigned int num_configs)
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{
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int i, ret;
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struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
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const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[selector];
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for (i = 0; i < pgrp->npins; i++) {
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ret = zynqmp_pinconf_cfg_set(pctldev, pgrp->pins[i], configs,
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num_configs);
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if (ret)
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return ret;
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}
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return 0;
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}
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static const struct pinconf_ops zynqmp_pinconf_ops = {
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.is_generic = true,
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.pin_config_get = zynqmp_pinconf_cfg_get,
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.pin_config_set = zynqmp_pinconf_cfg_set,
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.pin_config_group_set = zynqmp_pinconf_group_set,
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};
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static struct pinctrl_desc zynqmp_desc = {
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.name = "zynqmp_pinctrl",
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.owner = THIS_MODULE,
|
|
.pctlops = &zynqmp_pctrl_ops,
|
|
.pmxops = &zynqmp_pinmux_ops,
|
|
.confops = &zynqmp_pinconf_ops,
|
|
};
|
|
|
|
static int zynqmp_pinctrl_get_function_groups(u32 fid, u32 index, u16 *groups)
|
|
{
|
|
struct zynqmp_pm_query_data qdata = {0};
|
|
u32 payload[PAYLOAD_ARG_CNT];
|
|
int ret;
|
|
|
|
qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_GROUPS;
|
|
qdata.arg1 = fid;
|
|
qdata.arg2 = index;
|
|
|
|
ret = zynqmp_pm_query_data(qdata, payload);
|
|
if (ret)
|
|
return ret;
|
|
|
|
memcpy(groups, &payload[1], PINCTRL_GET_FUNC_GROUPS_RESP_LEN);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int zynqmp_pinctrl_get_func_num_groups(u32 fid, unsigned int *ngroups)
|
|
{
|
|
struct zynqmp_pm_query_data qdata = {0};
|
|
u32 payload[PAYLOAD_ARG_CNT];
|
|
int ret;
|
|
|
|
qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS;
|
|
qdata.arg1 = fid;
|
|
|
|
ret = zynqmp_pm_query_data(qdata, payload);
|
|
if (ret)
|
|
return ret;
|
|
|
|
*ngroups = payload[1];
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* zynqmp_pinctrl_prepare_func_groups() - prepare function and groups data
|
|
* @dev: Device pointer.
|
|
* @fid: Function ID.
|
|
* @func: Function data.
|
|
* @groups: Groups data.
|
|
*
|
|
* Query firmware to get group IDs for each function. Firmware returns
|
|
* group IDs. Based on group index for the function, group names in
|
|
* the function are stored. For example, the first group in "eth0" function
|
|
* is named as "eth0_0" and second group as "eth0_1" and so on.
|
|
*
|
|
* Based on the group ID received from the firmware, function stores name of
|
|
* the group for that group ID. For example, if "eth0" first group ID
|
|
* is x, groups[x] name will be stored as "eth0_0".
|
|
*
|
|
* Once done for each function, each function would have its group names
|
|
* and each groups would also have their names.
|
|
*
|
|
* Return: 0 on success else error code.
|
|
*/
|
|
static int zynqmp_pinctrl_prepare_func_groups(struct device *dev, u32 fid,
|
|
struct zynqmp_pmux_function *func,
|
|
struct zynqmp_pctrl_group *groups)
|
|
{
|
|
u16 resp[NUM_GROUPS_PER_RESP] = {0};
|
|
const char **fgroups;
|
|
int ret = 0, index, i;
|
|
|
|
fgroups = devm_kzalloc(dev, sizeof(*fgroups) * func->ngroups, GFP_KERNEL);
|
|
if (!fgroups)
|
|
return -ENOMEM;
|
|
|
|
for (index = 0; index < func->ngroups; index += NUM_GROUPS_PER_RESP) {
|
|
ret = zynqmp_pinctrl_get_function_groups(fid, index, resp);
|
|
if (ret)
|
|
return ret;
|
|
|
|
for (i = 0; i < NUM_GROUPS_PER_RESP; i++) {
|
|
if (resp[i] == NA_GROUP)
|
|
goto done;
|
|
|
|
if (resp[i] == RESERVED_GROUP)
|
|
continue;
|
|
|
|
fgroups[index + i] = devm_kasprintf(dev, GFP_KERNEL,
|
|
"%s_%d_grp",
|
|
func->name,
|
|
index + i);
|
|
if (!fgroups[index + i])
|
|
return -ENOMEM;
|
|
|
|
groups[resp[i]].name = devm_kasprintf(dev, GFP_KERNEL,
|
|
"%s_%d_grp",
|
|
func->name,
|
|
index + i);
|
|
if (!groups[resp[i]].name)
|
|
return -ENOMEM;
|
|
}
|
|
}
|
|
done:
|
|
func->groups = fgroups;
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void zynqmp_pinctrl_get_function_name(u32 fid, char *name)
|
|
{
|
|
struct zynqmp_pm_query_data qdata = {0};
|
|
u32 payload[PAYLOAD_ARG_CNT];
|
|
|
|
qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_NAME;
|
|
qdata.arg1 = fid;
|
|
|
|
/*
|
|
* Name of the function is maximum 16 bytes and cannot
|
|
* accommodate the return value in SMC buffers, hence ignoring
|
|
* the return value for this specific qid.
|
|
*/
|
|
zynqmp_pm_query_data(qdata, payload);
|
|
memcpy(name, payload, PINCTRL_GET_FUNC_NAME_RESP_LEN);
|
|
}
|
|
|
|
static int zynqmp_pinctrl_get_num_functions(unsigned int *nfuncs)
|
|
{
|
|
struct zynqmp_pm_query_data qdata = {0};
|
|
u32 payload[PAYLOAD_ARG_CNT];
|
|
int ret;
|
|
|
|
qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTIONS;
|
|
|
|
ret = zynqmp_pm_query_data(qdata, payload);
|
|
if (ret)
|
|
return ret;
|
|
|
|
*nfuncs = payload[1];
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int zynqmp_pinctrl_get_pin_groups(u32 pin, u32 index, u16 *groups)
|
|
{
|
|
struct zynqmp_pm_query_data qdata = {0};
|
|
u32 payload[PAYLOAD_ARG_CNT];
|
|
int ret;
|
|
|
|
qdata.qid = PM_QID_PINCTRL_GET_PIN_GROUPS;
|
|
qdata.arg1 = pin;
|
|
qdata.arg2 = index;
|
|
|
|
ret = zynqmp_pm_query_data(qdata, payload);
|
|
if (ret)
|
|
return ret;
|
|
|
|
memcpy(groups, &payload[1], PINCTRL_GET_PIN_GROUPS_RESP_LEN);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void zynqmp_pinctrl_group_add_pin(struct zynqmp_pctrl_group *group,
|
|
unsigned int pin)
|
|
{
|
|
group->pins[group->npins++] = pin;
|
|
}
|
|
|
|
/**
|
|
* zynqmp_pinctrl_create_pin_groups() - assign pins to respective groups
|
|
* @dev: Device pointer.
|
|
* @groups: Groups data.
|
|
* @pin: Pin number.
|
|
*
|
|
* Query firmware to get groups available for the given pin.
|
|
* Based on the firmware response(group IDs for the pin), add
|
|
* pin number to the respective group's pin array.
|
|
*
|
|
* Once all pins are queries, each groups would have its number
|
|
* of pins and pin numbers data.
|
|
*
|
|
* Return: 0 on success else error code.
|
|
*/
|
|
static int zynqmp_pinctrl_create_pin_groups(struct device *dev,
|
|
struct zynqmp_pctrl_group *groups,
|
|
unsigned int pin)
|
|
{
|
|
u16 resp[NUM_GROUPS_PER_RESP] = {0};
|
|
int ret, i, index = 0;
|
|
|
|
do {
|
|
ret = zynqmp_pinctrl_get_pin_groups(pin, index, resp);
|
|
if (ret)
|
|
return ret;
|
|
|
|
for (i = 0; i < NUM_GROUPS_PER_RESP; i++) {
|
|
if (resp[i] == NA_GROUP)
|
|
return ret;
|
|
|
|
if (resp[i] == RESERVED_GROUP)
|
|
continue;
|
|
|
|
zynqmp_pinctrl_group_add_pin(&groups[resp[i]], pin);
|
|
}
|
|
index += NUM_GROUPS_PER_RESP;
|
|
} while (index <= MAX_PIN_GROUPS);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* zynqmp_pinctrl_prepare_group_pins() - prepare each group's pin data
|
|
* @dev: Device pointer.
|
|
* @groups: Groups data.
|
|
* @ngroups: Number of groups.
|
|
*
|
|
* Prepare pin number and number of pins data for each pins.
|
|
*
|
|
* Return: 0 on success else error code.
|
|
*/
|
|
static int zynqmp_pinctrl_prepare_group_pins(struct device *dev,
|
|
struct zynqmp_pctrl_group *groups,
|
|
unsigned int ngroups)
|
|
{
|
|
unsigned int pin;
|
|
int ret;
|
|
|
|
for (pin = 0; pin < zynqmp_desc.npins; pin++) {
|
|
ret = zynqmp_pinctrl_create_pin_groups(dev, groups, pin);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* zynqmp_pinctrl_prepare_function_info() - prepare function info
|
|
* @dev: Device pointer.
|
|
* @pctrl: Pin control driver data.
|
|
*
|
|
* Query firmware for functions, groups and pin information and
|
|
* prepare pin control driver data.
|
|
*
|
|
* Query number of functions and number of function groups (number
|
|
* of groups in given function) to allocate required memory buffers
|
|
* for functions and groups. Once buffers are allocated to store
|
|
* functions and groups data, query and store required information
|
|
* (number of groups and group names for each function, number of
|
|
* pins and pin numbers for each group).
|
|
*
|
|
* Return: 0 on success else error code.
|
|
*/
|
|
static int zynqmp_pinctrl_prepare_function_info(struct device *dev,
|
|
struct zynqmp_pinctrl *pctrl)
|
|
{
|
|
struct zynqmp_pmux_function *funcs;
|
|
struct zynqmp_pctrl_group *groups;
|
|
int ret, i;
|
|
|
|
ret = zynqmp_pinctrl_get_num_functions(&pctrl->nfuncs);
|
|
if (ret)
|
|
return ret;
|
|
|
|
funcs = devm_kzalloc(dev, sizeof(*funcs) * pctrl->nfuncs, GFP_KERNEL);
|
|
if (!funcs)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < pctrl->nfuncs; i++) {
|
|
zynqmp_pinctrl_get_function_name(i, funcs[i].name);
|
|
|
|
ret = zynqmp_pinctrl_get_func_num_groups(i, &funcs[i].ngroups);
|
|
if (ret)
|
|
return ret;
|
|
|
|
pctrl->ngroups += funcs[i].ngroups;
|
|
}
|
|
|
|
groups = devm_kzalloc(dev, sizeof(*groups) * pctrl->ngroups, GFP_KERNEL);
|
|
if (!groups)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < pctrl->nfuncs; i++) {
|
|
ret = zynqmp_pinctrl_prepare_func_groups(dev, i, &funcs[i],
|
|
groups);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
ret = zynqmp_pinctrl_prepare_group_pins(dev, groups, pctrl->ngroups);
|
|
if (ret)
|
|
return ret;
|
|
|
|
pctrl->funcs = funcs;
|
|
pctrl->groups = groups;
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int zynqmp_pinctrl_get_num_pins(unsigned int *npins)
|
|
{
|
|
struct zynqmp_pm_query_data qdata = {0};
|
|
u32 payload[PAYLOAD_ARG_CNT];
|
|
int ret;
|
|
|
|
qdata.qid = PM_QID_PINCTRL_GET_NUM_PINS;
|
|
|
|
ret = zynqmp_pm_query_data(qdata, payload);
|
|
if (ret)
|
|
return ret;
|
|
|
|
*npins = payload[1];
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* zynqmp_pinctrl_prepare_pin_desc() - prepare pin description info
|
|
* @dev: Device pointer.
|
|
* @zynqmp_pins: Pin information.
|
|
* @npins: Number of pins.
|
|
*
|
|
* Query number of pins information from firmware and prepare pin
|
|
* description containing pin number and pin name.
|
|
*
|
|
* Return: 0 on success else error code.
|
|
*/
|
|
static int zynqmp_pinctrl_prepare_pin_desc(struct device *dev,
|
|
const struct pinctrl_pin_desc
|
|
**zynqmp_pins,
|
|
unsigned int *npins)
|
|
{
|
|
struct pinctrl_pin_desc *pins, *pin;
|
|
int ret;
|
|
int i;
|
|
|
|
ret = zynqmp_pinctrl_get_num_pins(npins);
|
|
if (ret)
|
|
return ret;
|
|
|
|
pins = devm_kzalloc(dev, sizeof(*pins) * *npins, GFP_KERNEL);
|
|
if (!pins)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < *npins; i++) {
|
|
pin = &pins[i];
|
|
pin->number = i;
|
|
pin->name = devm_kasprintf(dev, GFP_KERNEL, "%s%d",
|
|
ZYNQMP_PIN_PREFIX, i);
|
|
if (!pin->name)
|
|
return -ENOMEM;
|
|
}
|
|
|
|
*zynqmp_pins = pins;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int zynqmp_pinctrl_probe(struct platform_device *pdev)
|
|
{
|
|
struct zynqmp_pinctrl *pctrl;
|
|
int ret;
|
|
|
|
pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
|
|
if (!pctrl)
|
|
return -ENOMEM;
|
|
|
|
ret = zynqmp_pinctrl_prepare_pin_desc(&pdev->dev,
|
|
&zynqmp_desc.pins,
|
|
&zynqmp_desc.npins);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "pin desc prepare fail with %d\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = zynqmp_pinctrl_prepare_function_info(&pdev->dev, pctrl);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "function info prepare fail with %d\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
|
|
pctrl->pctrl = pinctrl_register(&zynqmp_desc, &pdev->dev, pctrl);
|
|
if (IS_ERR(pctrl->pctrl))
|
|
return PTR_ERR(pctrl->pctrl);
|
|
|
|
platform_set_drvdata(pdev, pctrl);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int zynqmp_pinctrl_remove(struct platform_device *pdev)
|
|
{
|
|
struct zynqmp_pinctrl *pctrl = platform_get_drvdata(pdev);
|
|
|
|
pinctrl_unregister(pctrl->pctrl);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id zynqmp_pinctrl_of_match[] = {
|
|
{ .compatible = "xlnx,zynqmp-pinctrl" },
|
|
{ }
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, zynqmp_pinctrl_of_match);
|
|
|
|
static struct platform_driver zynqmp_pinctrl_driver = {
|
|
.driver = {
|
|
.name = "zynqmp-pinctrl",
|
|
.of_match_table = zynqmp_pinctrl_of_match,
|
|
},
|
|
.probe = zynqmp_pinctrl_probe,
|
|
.remove = zynqmp_pinctrl_remove,
|
|
};
|
|
|
|
module_platform_driver(zynqmp_pinctrl_driver);
|
|
|
|
MODULE_AUTHOR("Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>");
|
|
MODULE_DESCRIPTION("ZynqMP Pin Controller Driver");
|
|
MODULE_LICENSE("GPL v2");
|