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![Uwe Kleine-König](/assets/img/avatar_default.png)
Since commit 5e5da1e9fb
("pwm: ab8500: Explicitly allocate pwm chip
base dynamically") all drivers use dynamic ID allocation explicitly. New
drivers are supposed to do the same, so remove support for driver
specified base IDs and drop all assignments in the low-level drivers.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
231 lines
5.2 KiB
C
231 lines
5.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* drivers/pwm/pwm-pxa.c
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*
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* simple driver for PWM (Pulse Width Modulator) controller
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*
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* 2008-02-13 initial version
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* eric miao <eric.miao@marvell.com>
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/pwm.h>
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#include <linux/of_device.h>
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#include <asm/div64.h>
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#define HAS_SECONDARY_PWM 0x10
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static const struct platform_device_id pwm_id_table[] = {
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/* PWM has_secondary_pwm? */
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{ "pxa25x-pwm", 0 },
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{ "pxa27x-pwm", HAS_SECONDARY_PWM },
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{ "pxa168-pwm", 0 },
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{ "pxa910-pwm", 0 },
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{ },
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};
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MODULE_DEVICE_TABLE(platform, pwm_id_table);
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/* PWM registers and bits definitions */
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#define PWMCR (0x00)
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#define PWMDCR (0x04)
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#define PWMPCR (0x08)
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#define PWMCR_SD (1 << 6)
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#define PWMDCR_FD (1 << 10)
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struct pxa_pwm_chip {
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struct pwm_chip chip;
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struct device *dev;
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struct clk *clk;
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void __iomem *mmio_base;
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};
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static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip)
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{
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return container_of(chip, struct pxa_pwm_chip, chip);
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}
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/*
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* period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
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* duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
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*/
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static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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int duty_ns, int period_ns)
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{
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struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
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unsigned long long c;
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unsigned long period_cycles, prescale, pv, dc;
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unsigned long offset;
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int rc;
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offset = pwm->hwpwm ? 0x10 : 0;
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c = clk_get_rate(pc->clk);
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c = c * period_ns;
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do_div(c, 1000000000);
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period_cycles = c;
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if (period_cycles < 1)
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period_cycles = 1;
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prescale = (period_cycles - 1) / 1024;
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pv = period_cycles / (prescale + 1) - 1;
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if (prescale > 63)
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return -EINVAL;
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if (duty_ns == period_ns)
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dc = PWMDCR_FD;
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else
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dc = (pv + 1) * duty_ns / period_ns;
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/* NOTE: the clock to PWM has to be enabled first
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* before writing to the registers
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*/
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rc = clk_prepare_enable(pc->clk);
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if (rc < 0)
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return rc;
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writel(prescale, pc->mmio_base + offset + PWMCR);
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writel(dc, pc->mmio_base + offset + PWMDCR);
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writel(pv, pc->mmio_base + offset + PWMPCR);
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clk_disable_unprepare(pc->clk);
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return 0;
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}
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static int pxa_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
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return clk_prepare_enable(pc->clk);
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}
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static void pxa_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
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clk_disable_unprepare(pc->clk);
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}
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static const struct pwm_ops pxa_pwm_ops = {
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.config = pxa_pwm_config,
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.enable = pxa_pwm_enable,
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.disable = pxa_pwm_disable,
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.owner = THIS_MODULE,
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};
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#ifdef CONFIG_OF
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/*
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* Device tree users must create one device instance for each PWM channel.
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* Hence we dispense with the HAS_SECONDARY_PWM and "tell" the original driver
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* code that this is a single channel pxa25x-pwm. Currently all devices are
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* supported identically.
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*/
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static const struct of_device_id pwm_of_match[] = {
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{ .compatible = "marvell,pxa250-pwm", .data = &pwm_id_table[0]},
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{ .compatible = "marvell,pxa270-pwm", .data = &pwm_id_table[0]},
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{ .compatible = "marvell,pxa168-pwm", .data = &pwm_id_table[0]},
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{ .compatible = "marvell,pxa910-pwm", .data = &pwm_id_table[0]},
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{ }
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};
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MODULE_DEVICE_TABLE(of, pwm_of_match);
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#else
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#define pwm_of_match NULL
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#endif
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static const struct platform_device_id *pxa_pwm_get_id_dt(struct device *dev)
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{
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const struct of_device_id *id = of_match_device(pwm_of_match, dev);
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return id ? id->data : NULL;
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}
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static struct pwm_device *
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pxa_pwm_of_xlate(struct pwm_chip *pc, const struct of_phandle_args *args)
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{
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struct pwm_device *pwm;
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pwm = pwm_request_from_chip(pc, 0, NULL);
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if (IS_ERR(pwm))
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return pwm;
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pwm->args.period = args->args[0];
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return pwm;
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}
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static int pwm_probe(struct platform_device *pdev)
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{
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const struct platform_device_id *id = platform_get_device_id(pdev);
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struct pxa_pwm_chip *pwm;
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int ret = 0;
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if (IS_ENABLED(CONFIG_OF) && id == NULL)
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id = pxa_pwm_get_id_dt(&pdev->dev);
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if (id == NULL)
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return -EINVAL;
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pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
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if (pwm == NULL)
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return -ENOMEM;
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pwm->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(pwm->clk))
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return PTR_ERR(pwm->clk);
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pwm->chip.dev = &pdev->dev;
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pwm->chip.ops = &pxa_pwm_ops;
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pwm->chip.npwm = (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1;
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if (IS_ENABLED(CONFIG_OF)) {
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pwm->chip.of_xlate = pxa_pwm_of_xlate;
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pwm->chip.of_pwm_n_cells = 1;
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}
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pwm->mmio_base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(pwm->mmio_base))
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return PTR_ERR(pwm->mmio_base);
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ret = pwmchip_add(&pwm->chip);
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if (ret < 0) {
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dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
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return ret;
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}
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platform_set_drvdata(pdev, pwm);
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return 0;
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}
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static int pwm_remove(struct platform_device *pdev)
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{
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struct pxa_pwm_chip *chip;
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chip = platform_get_drvdata(pdev);
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if (chip == NULL)
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return -ENODEV;
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return pwmchip_remove(&chip->chip);
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}
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static struct platform_driver pwm_driver = {
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.driver = {
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.name = "pxa25x-pwm",
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.of_match_table = pwm_of_match,
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},
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.probe = pwm_probe,
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.remove = pwm_remove,
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.id_table = pwm_id_table,
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};
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module_platform_driver(pwm_driver);
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MODULE_LICENSE("GPL v2");
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