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![Ralf Baechle](/assets/img/avatar_default.png)
Pass struct dev pointer to dma_cache_sync() dma_cache_sync() is ill-designed in that it does not have a struct device pointer argument which makes proper support for systems that consist of a mix of coherent and non-coherent DMA devices hard. Change dma_cache_sync to take a struct device pointer as first argument and fix all its callers to pass it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
222 lines
5.5 KiB
C
222 lines
5.5 KiB
C
#ifndef _ASM_SPARC64_DMA_MAPPING_H
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#define _ASM_SPARC64_DMA_MAPPING_H
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#ifdef CONFIG_PCI
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/* we implement the API below in terms of the existing PCI one,
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* so include it */
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#include <linux/pci.h>
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/* need struct page definitions */
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#include <linux/mm.h>
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static inline int
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dma_supported(struct device *dev, u64 mask)
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{
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BUG_ON(dev->bus != &pci_bus_type);
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return pci_dma_supported(to_pci_dev(dev), mask);
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}
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static inline int
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dma_set_mask(struct device *dev, u64 dma_mask)
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{
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BUG_ON(dev->bus != &pci_bus_type);
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return pci_set_dma_mask(to_pci_dev(dev), dma_mask);
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}
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static inline void *
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dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t flag)
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{
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BUG_ON(dev->bus != &pci_bus_type);
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return pci_iommu_ops->alloc_consistent(to_pci_dev(dev), size, dma_handle, flag);
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}
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static inline void
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dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_handle)
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{
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BUG_ON(dev->bus != &pci_bus_type);
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pci_free_consistent(to_pci_dev(dev), size, cpu_addr, dma_handle);
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}
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static inline dma_addr_t
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dma_map_single(struct device *dev, void *cpu_addr, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(dev->bus != &pci_bus_type);
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return pci_map_single(to_pci_dev(dev), cpu_addr, size, (int)direction);
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}
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static inline void
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dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(dev->bus != &pci_bus_type);
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pci_unmap_single(to_pci_dev(dev), dma_addr, size, (int)direction);
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}
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static inline dma_addr_t
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dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(dev->bus != &pci_bus_type);
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return pci_map_page(to_pci_dev(dev), page, offset, size, (int)direction);
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}
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static inline void
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dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(dev->bus != &pci_bus_type);
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pci_unmap_page(to_pci_dev(dev), dma_address, size, (int)direction);
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}
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static inline int
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dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction direction)
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{
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BUG_ON(dev->bus != &pci_bus_type);
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return pci_map_sg(to_pci_dev(dev), sg, nents, (int)direction);
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}
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static inline void
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dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
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enum dma_data_direction direction)
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{
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BUG_ON(dev->bus != &pci_bus_type);
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pci_unmap_sg(to_pci_dev(dev), sg, nhwentries, (int)direction);
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}
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static inline void
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dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(dev->bus != &pci_bus_type);
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pci_dma_sync_single_for_cpu(to_pci_dev(dev), dma_handle,
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size, (int)direction);
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}
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static inline void
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dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(dev->bus != &pci_bus_type);
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pci_dma_sync_single_for_device(to_pci_dev(dev), dma_handle,
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size, (int)direction);
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}
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static inline void
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dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
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enum dma_data_direction direction)
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{
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BUG_ON(dev->bus != &pci_bus_type);
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pci_dma_sync_sg_for_cpu(to_pci_dev(dev), sg, nelems, (int)direction);
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}
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static inline void
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dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
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enum dma_data_direction direction)
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{
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BUG_ON(dev->bus != &pci_bus_type);
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pci_dma_sync_sg_for_device(to_pci_dev(dev), sg, nelems, (int)direction);
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}
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static inline int
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dma_mapping_error(dma_addr_t dma_addr)
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{
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return pci_dma_mapping_error(dma_addr);
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}
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#else
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struct device;
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static inline void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag)
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{
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BUG();
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return NULL;
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}
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static inline void dma_free_coherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle)
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{
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BUG();
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}
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static inline void
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dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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BUG();
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}
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static inline void
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dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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BUG();
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}
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#endif /* PCI */
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/* Now for the API extensions over the pci_ one */
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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#define dma_is_consistent(d, h) (1)
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static inline int
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dma_get_cache_alignment(void)
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{
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/* no easy way to get cache size on all processors, so return
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* the maximum possible, to be safe */
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return (1 << INTERNODE_CACHE_SHIFT);
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}
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static inline void
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dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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/* just sync everything, that's all the pci API can do */
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dma_sync_single_for_cpu(dev, dma_handle, offset+size, direction);
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}
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static inline void
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dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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/* just sync everything, that's all the pci API can do */
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dma_sync_single_for_device(dev, dma_handle, offset+size, direction);
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}
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static inline void
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dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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/* could define this in terms of the dma_cache ... operations,
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* but if you get this on a platform, you should convert the platform
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* to using the generic device DMA API */
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BUG();
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}
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#endif /* _ASM_SPARC64_DMA_MAPPING_H */
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