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415d832497
These operations are documented as always ordered in include/asm-generic/bitops/instrumented-atomic.h, and producer-consumer type use cases where one side needs to ensure a flag is left pending after some shared data was updated rely on this ordering, even in the failure case. This is the case with the workqueue code, which currently suffers from a reproducible ordering violation on Apple M1 platforms (which are notoriously out-of-order) that ends up causing the TTY layer to fail to deliver data to userspace properly under the right conditions. This change fixes that bug. Change the documentation to restrict the "no order on failure" story to the _lock() variant (for which it makes sense), and remove the early-exit from the generic implementation, which is what causes the missing barrier semantics in that case. Without this, the remaining atomic op is fully ordered (including on ARM64 LSE, as of recent versions of the architecture spec). Suggested-by: Linus Torvalds <torvalds@linux-foundation.org> Cc: stable@vger.kernel.org Fixes:e986a0d6cb("locking/atomics, asm-generic/bitops/atomic.h: Rewrite using atomic_*() APIs") Fixes:61e02392d3("locking/atomic/bitops: Document and clarify ordering semantics for failed test_and_{}_bit()") Signed-off-by: Hector Martin <marcan@marcan.st> Acked-by: Will Deacon <will@kernel.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
70 lines
1.6 KiB
C
70 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_GENERIC_BITOPS_ATOMIC_H_
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#define _ASM_GENERIC_BITOPS_ATOMIC_H_
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#include <linux/atomic.h>
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#include <linux/compiler.h>
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#include <asm/barrier.h>
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/*
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* Implementation of atomic bitops using atomic-fetch ops.
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* See Documentation/atomic_bitops.txt for details.
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*/
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static __always_inline void
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arch_set_bit(unsigned int nr, volatile unsigned long *p)
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{
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p += BIT_WORD(nr);
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arch_atomic_long_or(BIT_MASK(nr), (atomic_long_t *)p);
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}
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static __always_inline void
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arch_clear_bit(unsigned int nr, volatile unsigned long *p)
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{
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p += BIT_WORD(nr);
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arch_atomic_long_andnot(BIT_MASK(nr), (atomic_long_t *)p);
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}
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static __always_inline void
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arch_change_bit(unsigned int nr, volatile unsigned long *p)
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{
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p += BIT_WORD(nr);
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arch_atomic_long_xor(BIT_MASK(nr), (atomic_long_t *)p);
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}
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static __always_inline int
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arch_test_and_set_bit(unsigned int nr, volatile unsigned long *p)
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{
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long old;
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unsigned long mask = BIT_MASK(nr);
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p += BIT_WORD(nr);
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old = arch_atomic_long_fetch_or(mask, (atomic_long_t *)p);
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return !!(old & mask);
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}
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static __always_inline int
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arch_test_and_clear_bit(unsigned int nr, volatile unsigned long *p)
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{
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long old;
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unsigned long mask = BIT_MASK(nr);
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p += BIT_WORD(nr);
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old = arch_atomic_long_fetch_andnot(mask, (atomic_long_t *)p);
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return !!(old & mask);
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}
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static __always_inline int
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arch_test_and_change_bit(unsigned int nr, volatile unsigned long *p)
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{
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long old;
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unsigned long mask = BIT_MASK(nr);
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p += BIT_WORD(nr);
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old = arch_atomic_long_fetch_xor(mask, (atomic_long_t *)p);
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return !!(old & mask);
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}
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#include <asm-generic/bitops/instrumented-atomic.h>
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#endif /* _ASM_GENERIC_BITOPS_ATOMIC_H */
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