Herve Codina 3178d58e0b soc: fsl: cpm1: Add support for QMC ... The QMC (QUICC Multichannel Controller) emulates up to 64 channels within one serial controller using the same TDM physical interface routed from the TSA. It is available in some PowerQUICC SoC such as the MPC885 or MPC866. It is also available on some Quicc Engine SoCs. This current version support CPM1 SoCs only and some enhancement are needed to support Quicc Engine SoCs. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Acked-by: Li Yang <leoyang.li@nxp.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20230217145645.1768659-7-herve.codina@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>		2023-03-05 23:37:03 +00:00
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amlogic	perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver	2022-11-21 18:28:45 +00:00
arc	clocksource/drivers/arc_timer: Eliminate redefined macro error	2021-10-16 22:15:01 +02:00
at91	ARM: at91: pm: avoid soft resetting AC DLL	2022-11-01 12:25:19 +02:00
bcm2835	firmware: raspberrypi: Fix type assignment	2023-01-10 13:44:04 -08:00
canaan
fsl	soc: fsl: cpm1: Add support for QMC	2023-03-05 23:37:03 +00:00
imx	ARM: imx: Initialize SoC ID on i.MX50	2021-05-13 15:42:21 +08:00
mediatek	memory: mtk-smi: Add enable IOMMU SMC command for MM master	2022-08-30 20:54:05 +03:00
microchip	clk: microchip: mpfs: add reset controller	2022-09-14 10:55:17 +03:00
mscc	net: mscc: ocelot: un-export unused regmap symbols	2023-02-06 22:33:15 -08:00
qcom	soc: qcom: spmi-pmic: add more PMIC SUBTYPE IDs	2022-10-17 14:56:14 -05:00
rockchip	soc: rockchip: power-domain: Manage resource conflicts with firmware	2022-05-09 03:36:52 +09:00
sa1100
sifive	soc: sifive: ccache: Rename SiFive L2 cache to Composable cache.	2022-10-13 11:06:51 -07:00
tegra	drm for 6.2:	2022-12-13 11:59:58 -08:00