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![]() Add RZ/G1E (R8A7745) Clock Pulse Generator / Module Standby and Software Reset support, using the CPG/MSSR driver core and the common R-Car Gen2 (and RZ/G) code. Based on the proof-of-concept R8A7791 CPG/MSSR patch by Geert Uytterhoeven <geert+renesas@glider.be>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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.. | ||
clk-div6.c | ||
clk-div6.h | ||
clk-emev2.c | ||
clk-mstp.c | ||
clk-r8a73a4.c | ||
clk-r8a7740.c | ||
clk-r8a7778.c | ||
clk-r8a7779.c | ||
clk-rcar-gen2.c | ||
clk-rz.c | ||
clk-sh73a0.c | ||
Kconfig | ||
Makefile | ||
r8a7743-cpg-mssr.c | ||
r8a7745-cpg-mssr.c | ||
r8a7795-cpg-mssr.c | ||
r8a7796-cpg-mssr.c | ||
rcar-gen2-cpg.c | ||
rcar-gen2-cpg.h | ||
rcar-gen3-cpg.c | ||
rcar-gen3-cpg.h | ||
renesas-cpg-mssr.c | ||
renesas-cpg-mssr.h |