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![Arnd Bergmann](/assets/img/avatar_default.png)
The newly added hwmon driver fails to build in an allmodconfig kernel: ERROR: "memblock_is_memory" [drivers/hwmon/xgene-hwmon.ko] undefined! According to comments in the code, the mailbox is a shared memory region, not a set of MMIO registers, so we should use memremap() for mapping it instead of ioremap or acpi_os_ioremap, and pointer dereferences instead of readl/writel. The driver already uses plain kernel pointers, so it's a bit unusual to work with functions that operate on __iomem pointers, and this fixes that part too. I'm using READ_ONCE/WRITE_ONCE here to keep the existing behavior regarding the ordering of the accesses from the CPU, but note that there are no barriers (also unchanged from before). I'm also keeping the endianness behavior, though I'm unsure whether the message data was supposed to be in LE32 format in the first place, it's possible this was meant to be interpreted as a byte stream instead. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Hoan Tran <hotran@apm.com> Tested-by: Hoan Tran <hotran@apm.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
787 lines
20 KiB
C
787 lines
20 KiB
C
/*
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* APM X-Gene SoC Hardware Monitoring Driver
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*
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* Copyright (c) 2016, Applied Micro Circuits Corporation
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* Author: Loc Ho <lho@apm.com>
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* Hoan Tran <hotran@apm.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*
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* This driver provides the following features:
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* - Retrieve CPU total power (uW)
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* - Retrieve IO total power (uW)
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* - Retrieve SoC temperature (milli-degree C) and alarm
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*/
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#include <linux/acpi.h>
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#include <linux/dma-mapping.h>
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#include <linux/hwmon.h>
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#include <linux/hwmon-sysfs.h>
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/kfifo.h>
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#include <linux/mailbox_controller.h>
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#include <linux/mailbox_client.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <acpi/pcc.h>
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/* SLIMpro message defines */
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#define MSG_TYPE_DBG 0
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#define MSG_TYPE_ERR 7
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#define MSG_TYPE_PWRMGMT 9
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#define MSG_TYPE(v) (((v) & 0xF0000000) >> 28)
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#define MSG_TYPE_SET(v) (((v) << 28) & 0xF0000000)
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#define MSG_SUBTYPE(v) (((v) & 0x0F000000) >> 24)
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#define MSG_SUBTYPE_SET(v) (((v) << 24) & 0x0F000000)
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#define DBG_SUBTYPE_SENSOR_READ 4
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#define SENSOR_RD_MSG 0x04FFE902
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#define SENSOR_RD_EN_ADDR(a) ((a) & 0x000FFFFF)
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#define PMD_PWR_REG 0x20
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#define PMD_PWR_MW_REG 0x26
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#define SOC_PWR_REG 0x21
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#define SOC_PWR_MW_REG 0x27
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#define SOC_TEMP_REG 0x10
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#define TEMP_NEGATIVE_BIT 8
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#define SENSOR_INVALID_DATA BIT(15)
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#define PWRMGMT_SUBTYPE_TPC 1
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#define TPC_ALARM 2
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#define TPC_GET_ALARM 3
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#define TPC_CMD(v) (((v) & 0x00FF0000) >> 16)
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#define TPC_CMD_SET(v) (((v) << 16) & 0x00FF0000)
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#define TPC_EN_MSG(hndl, cmd, type) \
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(MSG_TYPE_SET(MSG_TYPE_PWRMGMT) | \
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MSG_SUBTYPE_SET(hndl) | TPC_CMD_SET(cmd) | type)
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/* PCC defines */
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#define PCC_SIGNATURE_MASK 0x50424300
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#define PCCC_GENERATE_DB_INT BIT(15)
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#define PCCS_CMD_COMPLETE BIT(0)
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#define PCCS_SCI_DOORBEL BIT(1)
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#define PCCS_PLATFORM_NOTIFICATION BIT(3)
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/*
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* Arbitrary retries in case the remote processor is slow to respond
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* to PCC commands
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*/
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#define PCC_NUM_RETRIES 500
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#define ASYNC_MSG_FIFO_SIZE 16
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#define MBOX_OP_TIMEOUTMS 1000
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#define WATT_TO_mWATT(x) ((x) * 1000)
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#define mWATT_TO_uWATT(x) ((x) * 1000)
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#define CELSIUS_TO_mCELSIUS(x) ((x) * 1000)
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#define to_xgene_hwmon_dev(cl) \
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container_of(cl, struct xgene_hwmon_dev, mbox_client)
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struct slimpro_resp_msg {
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u32 msg;
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u32 param1;
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u32 param2;
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} __packed;
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struct xgene_hwmon_dev {
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struct device *dev;
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struct mbox_chan *mbox_chan;
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struct mbox_client mbox_client;
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int mbox_idx;
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spinlock_t kfifo_lock;
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struct mutex rd_mutex;
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struct completion rd_complete;
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int resp_pending;
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struct slimpro_resp_msg sync_msg;
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struct work_struct workq;
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struct kfifo_rec_ptr_1 async_msg_fifo;
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struct device *hwmon_dev;
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bool temp_critical_alarm;
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phys_addr_t comm_base_addr;
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void *pcc_comm_addr;
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u64 usecs_lat;
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};
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/*
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* This function tests and clears a bitmask then returns its old value
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*/
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static u16 xgene_word_tst_and_clr(u16 *addr, u16 mask)
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{
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u16 ret, val;
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val = le16_to_cpu(READ_ONCE(*addr));
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ret = val & mask;
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val &= ~mask;
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WRITE_ONCE(*addr, cpu_to_le16(val));
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return ret;
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}
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static int xgene_hwmon_pcc_rd(struct xgene_hwmon_dev *ctx, u32 *msg)
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{
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struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;
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u32 *ptr = (void *)(generic_comm_base + 1);
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int rc, i;
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u16 val;
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mutex_lock(&ctx->rd_mutex);
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init_completion(&ctx->rd_complete);
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ctx->resp_pending = true;
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/* Write signature for subspace */
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WRITE_ONCE(generic_comm_base->signature,
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cpu_to_le32(PCC_SIGNATURE_MASK | ctx->mbox_idx));
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/* Write to the shared command region */
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WRITE_ONCE(generic_comm_base->command,
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cpu_to_le16(MSG_TYPE(msg[0]) | PCCC_GENERATE_DB_INT));
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/* Flip CMD COMPLETE bit */
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val = le16_to_cpu(READ_ONCE(generic_comm_base->status));
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val &= ~PCCS_CMD_COMPLETE;
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WRITE_ONCE(generic_comm_base->status, cpu_to_le16(val));
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/* Copy the message to the PCC comm space */
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for (i = 0; i < sizeof(struct slimpro_resp_msg) / 4; i++)
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WRITE_ONCE(ptr[i], cpu_to_le32(msg[i]));
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/* Ring the doorbell */
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rc = mbox_send_message(ctx->mbox_chan, msg);
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if (rc < 0) {
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dev_err(ctx->dev, "Mailbox send error %d\n", rc);
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goto err;
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}
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if (!wait_for_completion_timeout(&ctx->rd_complete,
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usecs_to_jiffies(ctx->usecs_lat))) {
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dev_err(ctx->dev, "Mailbox operation timed out\n");
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rc = -ETIMEDOUT;
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goto err;
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}
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/* Check for error message */
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if (MSG_TYPE(ctx->sync_msg.msg) == MSG_TYPE_ERR) {
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rc = -EINVAL;
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goto err;
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}
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msg[0] = ctx->sync_msg.msg;
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msg[1] = ctx->sync_msg.param1;
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msg[2] = ctx->sync_msg.param2;
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err:
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mbox_chan_txdone(ctx->mbox_chan, 0);
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ctx->resp_pending = false;
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mutex_unlock(&ctx->rd_mutex);
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return rc;
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}
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static int xgene_hwmon_rd(struct xgene_hwmon_dev *ctx, u32 *msg)
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{
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int rc;
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mutex_lock(&ctx->rd_mutex);
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init_completion(&ctx->rd_complete);
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ctx->resp_pending = true;
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rc = mbox_send_message(ctx->mbox_chan, msg);
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if (rc < 0) {
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dev_err(ctx->dev, "Mailbox send error %d\n", rc);
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goto err;
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}
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if (!wait_for_completion_timeout(&ctx->rd_complete,
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msecs_to_jiffies(MBOX_OP_TIMEOUTMS))) {
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dev_err(ctx->dev, "Mailbox operation timed out\n");
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rc = -ETIMEDOUT;
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goto err;
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}
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/* Check for error message */
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if (MSG_TYPE(ctx->sync_msg.msg) == MSG_TYPE_ERR) {
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rc = -EINVAL;
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goto err;
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}
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msg[0] = ctx->sync_msg.msg;
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msg[1] = ctx->sync_msg.param1;
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msg[2] = ctx->sync_msg.param2;
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err:
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ctx->resp_pending = false;
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mutex_unlock(&ctx->rd_mutex);
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return rc;
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}
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static int xgene_hwmon_reg_map_rd(struct xgene_hwmon_dev *ctx, u32 addr,
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u32 *data)
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{
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u32 msg[3];
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int rc;
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msg[0] = SENSOR_RD_MSG;
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msg[1] = SENSOR_RD_EN_ADDR(addr);
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msg[2] = 0;
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if (acpi_disabled)
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rc = xgene_hwmon_rd(ctx, msg);
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else
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rc = xgene_hwmon_pcc_rd(ctx, msg);
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if (rc < 0)
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return rc;
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/*
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* Check if sensor data is valid.
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*/
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if (msg[1] & SENSOR_INVALID_DATA)
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return -ENODATA;
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*data = msg[1];
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return rc;
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}
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static int xgene_hwmon_get_notification_msg(struct xgene_hwmon_dev *ctx,
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u32 *amsg)
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{
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u32 msg[3];
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int rc;
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msg[0] = TPC_EN_MSG(PWRMGMT_SUBTYPE_TPC, TPC_GET_ALARM, 0);
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msg[1] = 0;
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msg[2] = 0;
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rc = xgene_hwmon_pcc_rd(ctx, msg);
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if (rc < 0)
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return rc;
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amsg[0] = msg[0];
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amsg[1] = msg[1];
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amsg[2] = msg[2];
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return rc;
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}
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static int xgene_hwmon_get_cpu_pwr(struct xgene_hwmon_dev *ctx, u32 *val)
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{
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u32 watt, mwatt;
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int rc;
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rc = xgene_hwmon_reg_map_rd(ctx, PMD_PWR_REG, &watt);
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if (rc < 0)
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return rc;
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rc = xgene_hwmon_reg_map_rd(ctx, PMD_PWR_MW_REG, &mwatt);
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if (rc < 0)
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return rc;
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*val = WATT_TO_mWATT(watt) + mwatt;
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return 0;
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}
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static int xgene_hwmon_get_io_pwr(struct xgene_hwmon_dev *ctx, u32 *val)
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{
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u32 watt, mwatt;
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int rc;
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rc = xgene_hwmon_reg_map_rd(ctx, SOC_PWR_REG, &watt);
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if (rc < 0)
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return rc;
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rc = xgene_hwmon_reg_map_rd(ctx, SOC_PWR_MW_REG, &mwatt);
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if (rc < 0)
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return rc;
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*val = WATT_TO_mWATT(watt) + mwatt;
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return 0;
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}
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static int xgene_hwmon_get_temp(struct xgene_hwmon_dev *ctx, u32 *val)
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{
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return xgene_hwmon_reg_map_rd(ctx, SOC_TEMP_REG, val);
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}
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/*
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* Sensor temperature/power functions
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*/
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static ssize_t temp1_input_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct xgene_hwmon_dev *ctx = dev_get_drvdata(dev);
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int rc, temp;
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u32 val;
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rc = xgene_hwmon_get_temp(ctx, &val);
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if (rc < 0)
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return rc;
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temp = sign_extend32(val, TEMP_NEGATIVE_BIT);
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return snprintf(buf, PAGE_SIZE, "%d\n", CELSIUS_TO_mCELSIUS(temp));
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}
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static ssize_t temp1_label_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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return snprintf(buf, PAGE_SIZE, "SoC Temperature\n");
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}
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static ssize_t temp1_critical_alarm_show(struct device *dev,
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struct device_attribute *devattr,
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char *buf)
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{
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struct xgene_hwmon_dev *ctx = dev_get_drvdata(dev);
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return snprintf(buf, PAGE_SIZE, "%d\n", ctx->temp_critical_alarm);
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}
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static ssize_t power1_label_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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return snprintf(buf, PAGE_SIZE, "CPU power\n");
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}
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static ssize_t power2_label_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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return snprintf(buf, PAGE_SIZE, "IO power\n");
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}
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static ssize_t power1_input_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct xgene_hwmon_dev *ctx = dev_get_drvdata(dev);
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u32 val;
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int rc;
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rc = xgene_hwmon_get_cpu_pwr(ctx, &val);
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if (rc < 0)
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return rc;
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return snprintf(buf, PAGE_SIZE, "%u\n", mWATT_TO_uWATT(val));
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}
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static ssize_t power2_input_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct xgene_hwmon_dev *ctx = dev_get_drvdata(dev);
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u32 val;
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int rc;
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rc = xgene_hwmon_get_io_pwr(ctx, &val);
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if (rc < 0)
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return rc;
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return snprintf(buf, PAGE_SIZE, "%u\n", mWATT_TO_uWATT(val));
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}
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|
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static DEVICE_ATTR_RO(temp1_label);
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static DEVICE_ATTR_RO(temp1_input);
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static DEVICE_ATTR_RO(temp1_critical_alarm);
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static DEVICE_ATTR_RO(power1_label);
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static DEVICE_ATTR_RO(power1_input);
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static DEVICE_ATTR_RO(power2_label);
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static DEVICE_ATTR_RO(power2_input);
|
|
|
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static struct attribute *xgene_hwmon_attrs[] = {
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&dev_attr_temp1_label.attr,
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&dev_attr_temp1_input.attr,
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&dev_attr_temp1_critical_alarm.attr,
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&dev_attr_power1_label.attr,
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&dev_attr_power1_input.attr,
|
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&dev_attr_power2_label.attr,
|
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&dev_attr_power2_input.attr,
|
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NULL,
|
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};
|
|
|
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ATTRIBUTE_GROUPS(xgene_hwmon);
|
|
|
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static int xgene_hwmon_tpc_alarm(struct xgene_hwmon_dev *ctx,
|
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struct slimpro_resp_msg *amsg)
|
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{
|
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ctx->temp_critical_alarm = !!amsg->param2;
|
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sysfs_notify(&ctx->dev->kobj, NULL, "temp1_critical_alarm");
|
|
|
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return 0;
|
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}
|
|
|
|
static void xgene_hwmon_process_pwrmsg(struct xgene_hwmon_dev *ctx,
|
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struct slimpro_resp_msg *amsg)
|
|
{
|
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if ((MSG_SUBTYPE(amsg->msg) == PWRMGMT_SUBTYPE_TPC) &&
|
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(TPC_CMD(amsg->msg) == TPC_ALARM))
|
|
xgene_hwmon_tpc_alarm(ctx, amsg);
|
|
}
|
|
|
|
/*
|
|
* This function is called to process async work queue
|
|
*/
|
|
static void xgene_hwmon_evt_work(struct work_struct *work)
|
|
{
|
|
struct slimpro_resp_msg amsg;
|
|
struct xgene_hwmon_dev *ctx;
|
|
int ret;
|
|
|
|
ctx = container_of(work, struct xgene_hwmon_dev, workq);
|
|
while (kfifo_out_spinlocked(&ctx->async_msg_fifo, &amsg,
|
|
sizeof(struct slimpro_resp_msg),
|
|
&ctx->kfifo_lock)) {
|
|
/*
|
|
* If PCC, send a consumer command to Platform to get info
|
|
* If Slimpro Mailbox, get message from specific FIFO
|
|
*/
|
|
if (!acpi_disabled) {
|
|
ret = xgene_hwmon_get_notification_msg(ctx,
|
|
(u32 *)&amsg);
|
|
if (ret < 0)
|
|
continue;
|
|
}
|
|
|
|
if (MSG_TYPE(amsg.msg) == MSG_TYPE_PWRMGMT)
|
|
xgene_hwmon_process_pwrmsg(ctx, &amsg);
|
|
}
|
|
}
|
|
|
|
static int xgene_hwmon_rx_ready(struct xgene_hwmon_dev *ctx, void *msg)
|
|
{
|
|
if (IS_ERR_OR_NULL(ctx->hwmon_dev) && !ctx->resp_pending) {
|
|
/* Enqueue to the FIFO */
|
|
kfifo_in_spinlocked(&ctx->async_msg_fifo, msg,
|
|
sizeof(struct slimpro_resp_msg),
|
|
&ctx->kfifo_lock);
|
|
return -ENODEV;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* This function is called when the SLIMpro Mailbox received a message
|
|
*/
|
|
static void xgene_hwmon_rx_cb(struct mbox_client *cl, void *msg)
|
|
{
|
|
struct xgene_hwmon_dev *ctx = to_xgene_hwmon_dev(cl);
|
|
|
|
/*
|
|
* While the driver registers with the mailbox framework, an interrupt
|
|
* can be pending before the probe function completes its
|
|
* initialization. If such condition occurs, just queue up the message
|
|
* as the driver is not ready for servicing the callback.
|
|
*/
|
|
if (xgene_hwmon_rx_ready(ctx, msg) < 0)
|
|
return;
|
|
|
|
/*
|
|
* Response message format:
|
|
* msg[0] is the return code of the operation
|
|
* msg[1] is the first parameter word
|
|
* msg[2] is the second parameter word
|
|
*
|
|
* As message only supports dword size, just assign it.
|
|
*/
|
|
|
|
/* Check for sync query */
|
|
if (ctx->resp_pending &&
|
|
((MSG_TYPE(((u32 *)msg)[0]) == MSG_TYPE_ERR) ||
|
|
(MSG_TYPE(((u32 *)msg)[0]) == MSG_TYPE_DBG &&
|
|
MSG_SUBTYPE(((u32 *)msg)[0]) == DBG_SUBTYPE_SENSOR_READ) ||
|
|
(MSG_TYPE(((u32 *)msg)[0]) == MSG_TYPE_PWRMGMT &&
|
|
MSG_SUBTYPE(((u32 *)msg)[0]) == PWRMGMT_SUBTYPE_TPC &&
|
|
TPC_CMD(((u32 *)msg)[0]) == TPC_ALARM))) {
|
|
ctx->sync_msg.msg = ((u32 *)msg)[0];
|
|
ctx->sync_msg.param1 = ((u32 *)msg)[1];
|
|
ctx->sync_msg.param2 = ((u32 *)msg)[2];
|
|
|
|
/* Operation waiting for response */
|
|
complete(&ctx->rd_complete);
|
|
|
|
return;
|
|
}
|
|
|
|
/* Enqueue to the FIFO */
|
|
kfifo_in_spinlocked(&ctx->async_msg_fifo, msg,
|
|
sizeof(struct slimpro_resp_msg), &ctx->kfifo_lock);
|
|
/* Schedule the bottom handler */
|
|
schedule_work(&ctx->workq);
|
|
}
|
|
|
|
/*
|
|
* This function is called when the PCC Mailbox received a message
|
|
*/
|
|
static void xgene_hwmon_pcc_rx_cb(struct mbox_client *cl, void *msg)
|
|
{
|
|
struct xgene_hwmon_dev *ctx = to_xgene_hwmon_dev(cl);
|
|
struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;
|
|
struct slimpro_resp_msg amsg;
|
|
|
|
/*
|
|
* While the driver registers with the mailbox framework, an interrupt
|
|
* can be pending before the probe function completes its
|
|
* initialization. If such condition occurs, just queue up the message
|
|
* as the driver is not ready for servicing the callback.
|
|
*/
|
|
if (xgene_hwmon_rx_ready(ctx, &amsg) < 0)
|
|
return;
|
|
|
|
msg = generic_comm_base + 1;
|
|
/* Check if platform sends interrupt */
|
|
if (!xgene_word_tst_and_clr(&generic_comm_base->status,
|
|
PCCS_SCI_DOORBEL))
|
|
return;
|
|
|
|
/*
|
|
* Response message format:
|
|
* msg[0] is the return code of the operation
|
|
* msg[1] is the first parameter word
|
|
* msg[2] is the second parameter word
|
|
*
|
|
* As message only supports dword size, just assign it.
|
|
*/
|
|
|
|
/* Check for sync query */
|
|
if (ctx->resp_pending &&
|
|
((MSG_TYPE(((u32 *)msg)[0]) == MSG_TYPE_ERR) ||
|
|
(MSG_TYPE(((u32 *)msg)[0]) == MSG_TYPE_DBG &&
|
|
MSG_SUBTYPE(((u32 *)msg)[0]) == DBG_SUBTYPE_SENSOR_READ) ||
|
|
(MSG_TYPE(((u32 *)msg)[0]) == MSG_TYPE_PWRMGMT &&
|
|
MSG_SUBTYPE(((u32 *)msg)[0]) == PWRMGMT_SUBTYPE_TPC &&
|
|
TPC_CMD(((u32 *)msg)[0]) == TPC_ALARM))) {
|
|
/* Check if platform completes command */
|
|
if (xgene_word_tst_and_clr(&generic_comm_base->status,
|
|
PCCS_CMD_COMPLETE)) {
|
|
ctx->sync_msg.msg = ((u32 *)msg)[0];
|
|
ctx->sync_msg.param1 = ((u32 *)msg)[1];
|
|
ctx->sync_msg.param2 = ((u32 *)msg)[2];
|
|
|
|
/* Operation waiting for response */
|
|
complete(&ctx->rd_complete);
|
|
|
|
return;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Platform notifies interrupt to OSPM.
|
|
* OPSM schedules a consumer command to get this information
|
|
* in a workqueue. Platform must wait until OSPM has issued
|
|
* a consumer command that serves this notification.
|
|
*/
|
|
|
|
/* Enqueue to the FIFO */
|
|
kfifo_in_spinlocked(&ctx->async_msg_fifo, &amsg,
|
|
sizeof(struct slimpro_resp_msg), &ctx->kfifo_lock);
|
|
/* Schedule the bottom handler */
|
|
schedule_work(&ctx->workq);
|
|
}
|
|
|
|
static void xgene_hwmon_tx_done(struct mbox_client *cl, void *msg, int ret)
|
|
{
|
|
if (ret) {
|
|
dev_dbg(cl->dev, "TX did not complete: CMD sent:%x, ret:%d\n",
|
|
*(u16 *)msg, ret);
|
|
} else {
|
|
dev_dbg(cl->dev, "TX completed. CMD sent:%x, ret:%d\n",
|
|
*(u16 *)msg, ret);
|
|
}
|
|
}
|
|
|
|
static int xgene_hwmon_probe(struct platform_device *pdev)
|
|
{
|
|
struct xgene_hwmon_dev *ctx;
|
|
struct mbox_client *cl;
|
|
int rc;
|
|
|
|
ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
|
|
if (!ctx)
|
|
return -ENOMEM;
|
|
|
|
ctx->dev = &pdev->dev;
|
|
platform_set_drvdata(pdev, ctx);
|
|
cl = &ctx->mbox_client;
|
|
|
|
spin_lock_init(&ctx->kfifo_lock);
|
|
mutex_init(&ctx->rd_mutex);
|
|
|
|
rc = kfifo_alloc(&ctx->async_msg_fifo,
|
|
sizeof(struct slimpro_resp_msg) * ASYNC_MSG_FIFO_SIZE,
|
|
GFP_KERNEL);
|
|
if (rc)
|
|
goto out_mbox_free;
|
|
|
|
INIT_WORK(&ctx->workq, xgene_hwmon_evt_work);
|
|
|
|
/* Request mailbox channel */
|
|
cl->dev = &pdev->dev;
|
|
cl->tx_done = xgene_hwmon_tx_done;
|
|
cl->tx_block = false;
|
|
cl->tx_tout = MBOX_OP_TIMEOUTMS;
|
|
cl->knows_txdone = false;
|
|
if (acpi_disabled) {
|
|
cl->rx_callback = xgene_hwmon_rx_cb;
|
|
ctx->mbox_chan = mbox_request_channel(cl, 0);
|
|
if (IS_ERR(ctx->mbox_chan)) {
|
|
dev_err(&pdev->dev,
|
|
"SLIMpro mailbox channel request failed\n");
|
|
return -ENODEV;
|
|
}
|
|
} else {
|
|
struct acpi_pcct_hw_reduced *cppc_ss;
|
|
|
|
if (device_property_read_u32(&pdev->dev, "pcc-channel",
|
|
&ctx->mbox_idx)) {
|
|
dev_err(&pdev->dev, "no pcc-channel property\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
cl->rx_callback = xgene_hwmon_pcc_rx_cb;
|
|
ctx->mbox_chan = pcc_mbox_request_channel(cl, ctx->mbox_idx);
|
|
if (IS_ERR(ctx->mbox_chan)) {
|
|
dev_err(&pdev->dev,
|
|
"PPC channel request failed\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
/*
|
|
* The PCC mailbox controller driver should
|
|
* have parsed the PCCT (global table of all
|
|
* PCC channels) and stored pointers to the
|
|
* subspace communication region in con_priv.
|
|
*/
|
|
cppc_ss = ctx->mbox_chan->con_priv;
|
|
if (!cppc_ss) {
|
|
dev_err(&pdev->dev, "PPC subspace not found\n");
|
|
rc = -ENODEV;
|
|
goto out_mbox_free;
|
|
}
|
|
|
|
if (!ctx->mbox_chan->mbox->txdone_irq) {
|
|
dev_err(&pdev->dev, "PCC IRQ not supported\n");
|
|
rc = -ENODEV;
|
|
goto out_mbox_free;
|
|
}
|
|
|
|
/*
|
|
* This is the shared communication region
|
|
* for the OS and Platform to communicate over.
|
|
*/
|
|
ctx->comm_base_addr = cppc_ss->base_address;
|
|
if (ctx->comm_base_addr) {
|
|
ctx->pcc_comm_addr = memremap(ctx->comm_base_addr,
|
|
cppc_ss->length,
|
|
MEMREMAP_WB);
|
|
} else {
|
|
dev_err(&pdev->dev, "Failed to get PCC comm region\n");
|
|
rc = -ENODEV;
|
|
goto out_mbox_free;
|
|
}
|
|
|
|
if (!ctx->pcc_comm_addr) {
|
|
dev_err(&pdev->dev,
|
|
"Failed to ioremap PCC comm region\n");
|
|
rc = -ENOMEM;
|
|
goto out_mbox_free;
|
|
}
|
|
|
|
/*
|
|
* cppc_ss->latency is just a Nominal value. In reality
|
|
* the remote processor could be much slower to reply.
|
|
* So add an arbitrary amount of wait on top of Nominal.
|
|
*/
|
|
ctx->usecs_lat = PCC_NUM_RETRIES * cppc_ss->latency;
|
|
}
|
|
|
|
ctx->hwmon_dev = hwmon_device_register_with_groups(ctx->dev,
|
|
"apm_xgene",
|
|
ctx,
|
|
xgene_hwmon_groups);
|
|
if (IS_ERR(ctx->hwmon_dev)) {
|
|
dev_err(&pdev->dev, "Failed to register HW monitor device\n");
|
|
rc = PTR_ERR(ctx->hwmon_dev);
|
|
goto out;
|
|
}
|
|
|
|
/*
|
|
* Schedule the bottom handler if there is a pending message.
|
|
*/
|
|
schedule_work(&ctx->workq);
|
|
|
|
dev_info(&pdev->dev, "APM X-Gene SoC HW monitor driver registered\n");
|
|
|
|
return 0;
|
|
|
|
out:
|
|
if (acpi_disabled)
|
|
mbox_free_channel(ctx->mbox_chan);
|
|
else
|
|
pcc_mbox_free_channel(ctx->mbox_chan);
|
|
out_mbox_free:
|
|
kfifo_free(&ctx->async_msg_fifo);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static int xgene_hwmon_remove(struct platform_device *pdev)
|
|
{
|
|
struct xgene_hwmon_dev *ctx = platform_get_drvdata(pdev);
|
|
|
|
hwmon_device_unregister(ctx->hwmon_dev);
|
|
kfifo_free(&ctx->async_msg_fifo);
|
|
if (acpi_disabled)
|
|
mbox_free_channel(ctx->mbox_chan);
|
|
else
|
|
pcc_mbox_free_channel(ctx->mbox_chan);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_ACPI
|
|
static const struct acpi_device_id xgene_hwmon_acpi_match[] = {
|
|
{"APMC0D29", 0},
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(acpi, xgene_hwmon_acpi_match);
|
|
#endif
|
|
|
|
static const struct of_device_id xgene_hwmon_of_match[] = {
|
|
{.compatible = "apm,xgene-slimpro-hwmon"},
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(of, xgene_hwmon_of_match);
|
|
|
|
static struct platform_driver xgene_hwmon_driver __refdata = {
|
|
.probe = xgene_hwmon_probe,
|
|
.remove = xgene_hwmon_remove,
|
|
.driver = {
|
|
.name = "xgene-slimpro-hwmon",
|
|
.of_match_table = xgene_hwmon_of_match,
|
|
.acpi_match_table = ACPI_PTR(xgene_hwmon_acpi_match),
|
|
},
|
|
};
|
|
module_platform_driver(xgene_hwmon_driver);
|
|
|
|
MODULE_DESCRIPTION("APM X-Gene SoC hardware monitor");
|
|
MODULE_LICENSE("GPL");
|