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![Markus Elfring](/assets/img/avatar_default.png)
The field "owner" is set by core. Thus delete an extra initialisation. Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
402 lines
9.2 KiB
C
402 lines
9.2 KiB
C
/*
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* Watchdog driver for Alphascale ASM9260.
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*
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* Copyright (c) 2014 Oleksij Rempel <linux@rempel-privat.de>
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*
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* Licensed under GPLv2 or later.
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*/
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#include <linux/bitops.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/reboot.h>
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#include <linux/reset.h>
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#include <linux/watchdog.h>
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#define CLOCK_FREQ 1000000
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/* Watchdog Mode register */
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#define HW_WDMOD 0x00
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/* Wake interrupt. Set by HW, can't be cleared. */
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#define BM_MOD_WDINT BIT(3)
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/* This bit set if timeout reached. Cleared by SW. */
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#define BM_MOD_WDTOF BIT(2)
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/* HW Reset on timeout */
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#define BM_MOD_WDRESET BIT(1)
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/* WD enable */
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#define BM_MOD_WDEN BIT(0)
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/*
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* Watchdog Timer Constant register
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* Minimal value is 0xff, the meaning of this value
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* depends on used clock: T = WDCLK * (0xff + 1) * 4
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*/
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#define HW_WDTC 0x04
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#define BM_WDTC_MAX(freq) (0x7fffffff / (freq))
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/* Watchdog Feed register */
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#define HW_WDFEED 0x08
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/* Watchdog Timer Value register */
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#define HW_WDTV 0x0c
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#define ASM9260_WDT_DEFAULT_TIMEOUT 30
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enum asm9260_wdt_mode {
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HW_RESET,
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SW_RESET,
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DEBUG,
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};
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struct asm9260_wdt_priv {
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struct device *dev;
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struct watchdog_device wdd;
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struct clk *clk;
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struct clk *clk_ahb;
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struct reset_control *rst;
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struct notifier_block restart_handler;
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void __iomem *iobase;
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int irq;
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unsigned long wdt_freq;
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enum asm9260_wdt_mode mode;
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};
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static int asm9260_wdt_feed(struct watchdog_device *wdd)
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{
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struct asm9260_wdt_priv *priv = watchdog_get_drvdata(wdd);
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iowrite32(0xaa, priv->iobase + HW_WDFEED);
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iowrite32(0x55, priv->iobase + HW_WDFEED);
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return 0;
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}
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static unsigned int asm9260_wdt_gettimeleft(struct watchdog_device *wdd)
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{
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struct asm9260_wdt_priv *priv = watchdog_get_drvdata(wdd);
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u32 counter;
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counter = ioread32(priv->iobase + HW_WDTV);
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return DIV_ROUND_CLOSEST(counter, priv->wdt_freq);
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}
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static int asm9260_wdt_updatetimeout(struct watchdog_device *wdd)
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{
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struct asm9260_wdt_priv *priv = watchdog_get_drvdata(wdd);
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u32 counter;
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counter = wdd->timeout * priv->wdt_freq;
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iowrite32(counter, priv->iobase + HW_WDTC);
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return 0;
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}
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static int asm9260_wdt_enable(struct watchdog_device *wdd)
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{
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struct asm9260_wdt_priv *priv = watchdog_get_drvdata(wdd);
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u32 mode = 0;
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if (priv->mode == HW_RESET)
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mode = BM_MOD_WDRESET;
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iowrite32(BM_MOD_WDEN | mode, priv->iobase + HW_WDMOD);
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asm9260_wdt_updatetimeout(wdd);
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asm9260_wdt_feed(wdd);
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return 0;
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}
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static int asm9260_wdt_disable(struct watchdog_device *wdd)
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{
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struct asm9260_wdt_priv *priv = watchdog_get_drvdata(wdd);
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/* The only way to disable WD is to reset it. */
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reset_control_assert(priv->rst);
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reset_control_deassert(priv->rst);
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return 0;
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}
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static int asm9260_wdt_settimeout(struct watchdog_device *wdd, unsigned int to)
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{
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wdd->timeout = to;
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asm9260_wdt_updatetimeout(wdd);
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return 0;
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}
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static void asm9260_wdt_sys_reset(struct asm9260_wdt_priv *priv)
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{
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/* init WD if it was not started */
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iowrite32(BM_MOD_WDEN | BM_MOD_WDRESET, priv->iobase + HW_WDMOD);
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iowrite32(0xff, priv->iobase + HW_WDTC);
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/* first pass correct sequence */
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asm9260_wdt_feed(&priv->wdd);
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/*
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* Then write wrong pattern to the feed to trigger reset
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* ASAP.
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*/
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iowrite32(0xff, priv->iobase + HW_WDFEED);
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mdelay(1000);
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}
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static irqreturn_t asm9260_wdt_irq(int irq, void *devid)
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{
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struct asm9260_wdt_priv *priv = devid;
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u32 stat;
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stat = ioread32(priv->iobase + HW_WDMOD);
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if (!(stat & BM_MOD_WDINT))
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return IRQ_NONE;
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if (priv->mode == DEBUG) {
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dev_info(priv->dev, "Watchdog Timeout. Do nothing.\n");
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} else {
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dev_info(priv->dev, "Watchdog Timeout. Doing SW Reset.\n");
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asm9260_wdt_sys_reset(priv);
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}
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return IRQ_HANDLED;
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}
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static int asm9260_restart_handler(struct notifier_block *this,
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unsigned long mode, void *cmd)
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{
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struct asm9260_wdt_priv *priv =
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container_of(this, struct asm9260_wdt_priv, restart_handler);
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asm9260_wdt_sys_reset(priv);
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return NOTIFY_DONE;
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}
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static const struct watchdog_info asm9260_wdt_ident = {
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING
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| WDIOF_MAGICCLOSE,
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.identity = "Alphascale asm9260 Watchdog",
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};
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static struct watchdog_ops asm9260_wdt_ops = {
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.owner = THIS_MODULE,
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.start = asm9260_wdt_enable,
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.stop = asm9260_wdt_disable,
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.get_timeleft = asm9260_wdt_gettimeleft,
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.ping = asm9260_wdt_feed,
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.set_timeout = asm9260_wdt_settimeout,
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};
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static int asm9260_wdt_get_dt_clks(struct asm9260_wdt_priv *priv)
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{
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int err;
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unsigned long clk;
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priv->clk = devm_clk_get(priv->dev, "mod");
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if (IS_ERR(priv->clk)) {
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dev_err(priv->dev, "Failed to get \"mod\" clk\n");
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return PTR_ERR(priv->clk);
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}
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/* configure AHB clock */
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priv->clk_ahb = devm_clk_get(priv->dev, "ahb");
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if (IS_ERR(priv->clk_ahb)) {
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dev_err(priv->dev, "Failed to get \"ahb\" clk\n");
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return PTR_ERR(priv->clk_ahb);
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}
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err = clk_prepare_enable(priv->clk_ahb);
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if (err) {
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dev_err(priv->dev, "Failed to enable ahb_clk!\n");
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return err;
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}
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err = clk_set_rate(priv->clk, CLOCK_FREQ);
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if (err) {
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clk_disable_unprepare(priv->clk_ahb);
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dev_err(priv->dev, "Failed to set rate!\n");
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return err;
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}
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err = clk_prepare_enable(priv->clk);
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if (err) {
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clk_disable_unprepare(priv->clk_ahb);
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dev_err(priv->dev, "Failed to enable clk!\n");
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return err;
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}
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/* wdt has internal divider */
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clk = clk_get_rate(priv->clk);
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if (!clk) {
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clk_disable_unprepare(priv->clk);
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clk_disable_unprepare(priv->clk_ahb);
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dev_err(priv->dev, "Failed, clk is 0!\n");
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return -EINVAL;
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}
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priv->wdt_freq = clk / 2;
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return 0;
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}
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static void asm9260_wdt_get_dt_mode(struct asm9260_wdt_priv *priv)
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{
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const char *tmp;
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int ret;
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/* default mode */
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priv->mode = HW_RESET;
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ret = of_property_read_string(priv->dev->of_node,
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"alphascale,mode", &tmp);
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if (ret < 0)
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return;
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if (!strcmp(tmp, "hw"))
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priv->mode = HW_RESET;
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else if (!strcmp(tmp, "sw"))
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priv->mode = SW_RESET;
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else if (!strcmp(tmp, "debug"))
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priv->mode = DEBUG;
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else
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dev_warn(priv->dev, "unknown reset-type: %s. Using default \"hw\" mode.",
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tmp);
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}
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static int asm9260_wdt_probe(struct platform_device *pdev)
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{
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struct asm9260_wdt_priv *priv;
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struct watchdog_device *wdd;
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struct resource *res;
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int ret;
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const char * const mode_name[] = { "hw", "sw", "debug", };
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priv = devm_kzalloc(&pdev->dev, sizeof(struct asm9260_wdt_priv),
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GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->dev = &pdev->dev;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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priv->iobase = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(priv->iobase))
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return PTR_ERR(priv->iobase);
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ret = asm9260_wdt_get_dt_clks(priv);
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if (ret)
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return ret;
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priv->rst = devm_reset_control_get(&pdev->dev, "wdt_rst");
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if (IS_ERR(priv->rst))
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return PTR_ERR(priv->rst);
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wdd = &priv->wdd;
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wdd->info = &asm9260_wdt_ident;
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wdd->ops = &asm9260_wdt_ops;
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wdd->min_timeout = 1;
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wdd->max_timeout = BM_WDTC_MAX(priv->wdt_freq);
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wdd->parent = &pdev->dev;
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watchdog_set_drvdata(wdd, priv);
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/*
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* If 'timeout-sec' unspecified in devicetree, assume a 30 second
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* default, unless the max timeout is less than 30 seconds, then use
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* the max instead.
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*/
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wdd->timeout = ASM9260_WDT_DEFAULT_TIMEOUT;
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watchdog_init_timeout(wdd, 0, &pdev->dev);
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asm9260_wdt_get_dt_mode(priv);
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if (priv->mode != HW_RESET)
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priv->irq = platform_get_irq(pdev, 0);
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if (priv->irq > 0) {
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/*
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* Not all supported platforms specify an interrupt for the
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* watchdog, so let's make it optional.
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*/
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ret = devm_request_irq(&pdev->dev, priv->irq,
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asm9260_wdt_irq, 0, pdev->name, priv);
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if (ret < 0)
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dev_warn(&pdev->dev, "failed to request IRQ\n");
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}
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ret = watchdog_register_device(wdd);
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if (ret)
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goto clk_off;
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platform_set_drvdata(pdev, priv);
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priv->restart_handler.notifier_call = asm9260_restart_handler;
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priv->restart_handler.priority = 128;
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ret = register_restart_handler(&priv->restart_handler);
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if (ret)
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dev_warn(&pdev->dev, "cannot register restart handler\n");
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dev_info(&pdev->dev, "Watchdog enabled (timeout: %d sec, mode: %s)\n",
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wdd->timeout, mode_name[priv->mode]);
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return 0;
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clk_off:
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clk_disable_unprepare(priv->clk);
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clk_disable_unprepare(priv->clk_ahb);
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return ret;
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}
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static void asm9260_wdt_shutdown(struct platform_device *pdev)
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{
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struct asm9260_wdt_priv *priv = platform_get_drvdata(pdev);
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asm9260_wdt_disable(&priv->wdd);
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}
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static int asm9260_wdt_remove(struct platform_device *pdev)
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{
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struct asm9260_wdt_priv *priv = platform_get_drvdata(pdev);
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asm9260_wdt_disable(&priv->wdd);
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unregister_restart_handler(&priv->restart_handler);
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watchdog_unregister_device(&priv->wdd);
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clk_disable_unprepare(priv->clk);
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clk_disable_unprepare(priv->clk_ahb);
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return 0;
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}
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static const struct of_device_id asm9260_wdt_of_match[] = {
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{ .compatible = "alphascale,asm9260-wdt"},
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{},
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};
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MODULE_DEVICE_TABLE(of, asm9260_wdt_of_match);
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static struct platform_driver asm9260_wdt_driver = {
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.driver = {
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.name = "asm9260-wdt",
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.of_match_table = asm9260_wdt_of_match,
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},
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.probe = asm9260_wdt_probe,
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.remove = asm9260_wdt_remove,
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.shutdown = asm9260_wdt_shutdown,
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};
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module_platform_driver(asm9260_wdt_driver);
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MODULE_DESCRIPTION("asm9260 WatchDog Timer Driver");
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MODULE_AUTHOR("Oleksij Rempel <linux@rempel-privat.de>");
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MODULE_LICENSE("GPL");
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