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![afzal mohammed](/assets/img/avatar_default.png)
request_irq() is preferred over setup_irq(). The early boot setup_irq() invocations happen either via 'init_IRQ()' or 'time_init()', while memory allocators are ready by 'mm_init()'. Per tglx[1], setup_irq() existed in olden days when allocators were not ready by the time early interrupts were initialized. Hence replace setup_irq() by request_irq(). Seldom remove_irq() usage has been observed coupled with setup_irq(), wherever that has been found, it too has been replaced by free_irq(). A build error that was reported by kbuild test robot <lkp@intel.com> in the previous version of the patch also has been fixed. [1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/91961c77c1cf93d41523f5e1ac52043f32f97077.1582799709.git.afzal.mohd.ma@gmail.com
202 lines
5.2 KiB
C
202 lines
5.2 KiB
C
/*
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* Copyright (C) 2012 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/jiffies.h>
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#include <linux/clockchips.h>
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#include <linux/types.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#define KONA_GPTIMER_STCS_OFFSET 0x00000000
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#define KONA_GPTIMER_STCLO_OFFSET 0x00000004
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#define KONA_GPTIMER_STCHI_OFFSET 0x00000008
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#define KONA_GPTIMER_STCM0_OFFSET 0x0000000C
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#define KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT 0
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#define KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT 4
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struct kona_bcm_timers {
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int tmr_irq;
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void __iomem *tmr_regs;
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};
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static struct kona_bcm_timers timers;
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static u32 arch_timer_rate;
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/*
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* We use the peripheral timers for system tick, the cpu global timer for
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* profile tick
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*/
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static void kona_timer_disable_and_clear(void __iomem *base)
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{
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uint32_t reg;
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/*
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* clear and disable interrupts
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* We are using compare/match register 0 for our system interrupts
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*/
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reg = readl(base + KONA_GPTIMER_STCS_OFFSET);
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/* Clear compare (0) interrupt */
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reg |= 1 << KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT;
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/* disable compare */
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reg &= ~(1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
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writel(reg, base + KONA_GPTIMER_STCS_OFFSET);
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}
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static int
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kona_timer_get_counter(void __iomem *timer_base, uint32_t *msw, uint32_t *lsw)
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{
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int loop_limit = 3;
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/*
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* Read 64-bit free running counter
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* 1. Read hi-word
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* 2. Read low-word
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* 3. Read hi-word again
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* 4.1
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* if new hi-word is not equal to previously read hi-word, then
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* start from #1
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* 4.2
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* if new hi-word is equal to previously read hi-word then stop.
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*/
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do {
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*msw = readl(timer_base + KONA_GPTIMER_STCHI_OFFSET);
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*lsw = readl(timer_base + KONA_GPTIMER_STCLO_OFFSET);
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if (*msw == readl(timer_base + KONA_GPTIMER_STCHI_OFFSET))
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break;
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} while (--loop_limit);
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if (!loop_limit) {
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pr_err("bcm_kona_timer: getting counter failed.\n");
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pr_err(" Timer will be impacted\n");
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return -ETIMEDOUT;
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}
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return 0;
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}
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static int kona_timer_set_next_event(unsigned long clc,
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struct clock_event_device *unused)
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{
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/*
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* timer (0) is disabled by the timer interrupt already
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* so, here we reload the next event value and re-enable
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* the timer.
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*
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* This way, we are potentially losing the time between
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* timer-interrupt->set_next_event. CPU local timers, when
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* they come in should get rid of skew.
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*/
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uint32_t lsw, msw;
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uint32_t reg;
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int ret;
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ret = kona_timer_get_counter(timers.tmr_regs, &msw, &lsw);
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if (ret)
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return ret;
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/* Load the "next" event tick value */
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writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET);
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/* Enable compare */
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reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
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reg |= (1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
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writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
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return 0;
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}
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static int kona_timer_shutdown(struct clock_event_device *evt)
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{
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kona_timer_disable_and_clear(timers.tmr_regs);
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return 0;
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}
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static struct clock_event_device kona_clockevent_timer = {
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.name = "timer 1",
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.features = CLOCK_EVT_FEAT_ONESHOT,
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.set_next_event = kona_timer_set_next_event,
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.set_state_shutdown = kona_timer_shutdown,
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.tick_resume = kona_timer_shutdown,
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};
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static void __init kona_timer_clockevents_init(void)
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{
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kona_clockevent_timer.cpumask = cpumask_of(0);
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clockevents_config_and_register(&kona_clockevent_timer,
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arch_timer_rate, 6, 0xffffffff);
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}
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static irqreturn_t kona_timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evt = &kona_clockevent_timer;
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kona_timer_disable_and_clear(timers.tmr_regs);
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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static int __init kona_timer_init(struct device_node *node)
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{
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u32 freq;
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struct clk *external_clk;
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external_clk = of_clk_get_by_name(node, NULL);
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if (!IS_ERR(external_clk)) {
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arch_timer_rate = clk_get_rate(external_clk);
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clk_prepare_enable(external_clk);
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} else if (!of_property_read_u32(node, "clock-frequency", &freq)) {
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arch_timer_rate = freq;
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} else {
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pr_err("Kona Timer v1 unable to determine clock-frequency\n");
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return -EINVAL;
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}
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/* Setup IRQ numbers */
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timers.tmr_irq = irq_of_parse_and_map(node, 0);
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/* Setup IO addresses */
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timers.tmr_regs = of_iomap(node, 0);
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kona_timer_disable_and_clear(timers.tmr_regs);
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kona_timer_clockevents_init();
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if (request_irq(timers.tmr_irq, kona_timer_interrupt, IRQF_TIMER,
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"Kona Timer Tick", NULL))
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pr_err("%s: request_irq() failed\n", "Kona Timer Tick");
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kona_timer_set_next_event((arch_timer_rate / HZ), NULL);
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return 0;
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}
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TIMER_OF_DECLARE(brcm_kona, "brcm,kona-timer", kona_timer_init);
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/*
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* bcm,kona-timer is deprecated by brcm,kona-timer
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* being kept here for driver compatibility
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*/
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TIMER_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);
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