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![Xu Yilun](/assets/img/avatar_default.png)
Error reporting interrupt is very useful to notify users that some errors are detected by the hardware. Once users are notified, they could query hardware logged error states, no need to continuously poll on these states. This patch adds interrupt support for port error reporting sub feature. It follows the common DFL interrupt notification and handling mechanism, implements two ioctl commands below for user to query number of irqs supported, and set/unset interrupt triggers. Ioctls: * DFL_FPGA_PORT_ERR_GET_IRQ_NUM get the number of irqs, which is used to determine whether/how many interrupts error reporting feature supports. * DFL_FPGA_PORT_ERR_SET_IRQ set/unset given eventfds as error interrupt triggers. Signed-off-by: Luwei Kang <luwei.kang@intel.com> Signed-off-by: Wu Hao <hao.wu@intel.com> Signed-off-by: Xu Yilun <yilun.xu@intel.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Acked-by: Wu Hao <hao.wu@intel.com> Signed-off-by: Moritz Fischer <mdf@kernel.org>
247 lines
6 KiB
C
247 lines
6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Driver for FPGA Accelerated Function Unit (AFU) Error Reporting
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*
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* Copyright 2019 Intel Corporation, Inc.
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*
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* Authors:
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* Wu Hao <hao.wu@linux.intel.com>
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* Xiao Guangrong <guangrong.xiao@linux.intel.com>
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* Joseph Grecco <joe.grecco@intel.com>
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* Enno Luebbers <enno.luebbers@intel.com>
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* Tim Whisonant <tim.whisonant@intel.com>
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* Ananda Ravuri <ananda.ravuri@intel.com>
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* Mitchel Henry <henry.mitchel@intel.com>
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*/
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#include <linux/fpga-dfl.h>
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#include <linux/uaccess.h>
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#include "dfl-afu.h"
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#define PORT_ERROR_MASK 0x8
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#define PORT_ERROR 0x10
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#define PORT_FIRST_ERROR 0x18
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#define PORT_MALFORMED_REQ0 0x20
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#define PORT_MALFORMED_REQ1 0x28
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#define ERROR_MASK GENMASK_ULL(63, 0)
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/* mask or unmask port errors by the error mask register. */
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static void __afu_port_err_mask(struct device *dev, bool mask)
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{
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void __iomem *base;
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base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_ERROR);
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writeq(mask ? ERROR_MASK : 0, base + PORT_ERROR_MASK);
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}
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static void afu_port_err_mask(struct device *dev, bool mask)
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{
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struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);
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mutex_lock(&pdata->lock);
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__afu_port_err_mask(dev, mask);
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mutex_unlock(&pdata->lock);
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}
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/* clear port errors. */
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static int afu_port_err_clear(struct device *dev, u64 err)
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{
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struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);
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struct platform_device *pdev = to_platform_device(dev);
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void __iomem *base_err, *base_hdr;
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int ret = -EBUSY;
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u64 v;
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base_err = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_ERROR);
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base_hdr = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER);
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mutex_lock(&pdata->lock);
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/*
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* clear Port Errors
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*
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* - Check for AP6 State
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* - Halt Port by keeping Port in reset
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* - Set PORT Error mask to all 1 to mask errors
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* - Clear all errors
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* - Set Port mask to all 0 to enable errors
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* - All errors start capturing new errors
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* - Enable Port by pulling the port out of reset
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*/
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/* if device is still in AP6 power state, can not clear any error. */
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v = readq(base_hdr + PORT_HDR_STS);
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if (FIELD_GET(PORT_STS_PWR_STATE, v) == PORT_STS_PWR_STATE_AP6) {
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dev_err(dev, "Could not clear errors, device in AP6 state.\n");
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goto done;
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}
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/* Halt Port by keeping Port in reset */
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ret = __afu_port_disable(pdev);
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if (ret)
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goto done;
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/* Mask all errors */
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__afu_port_err_mask(dev, true);
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/* Clear errors if err input matches with current port errors.*/
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v = readq(base_err + PORT_ERROR);
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if (v == err) {
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writeq(v, base_err + PORT_ERROR);
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v = readq(base_err + PORT_FIRST_ERROR);
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writeq(v, base_err + PORT_FIRST_ERROR);
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} else {
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ret = -EINVAL;
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}
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/* Clear mask */
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__afu_port_err_mask(dev, false);
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/* Enable the Port by clear the reset */
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__afu_port_enable(pdev);
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done:
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mutex_unlock(&pdata->lock);
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return ret;
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}
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static ssize_t errors_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);
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void __iomem *base;
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u64 error;
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base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_ERROR);
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mutex_lock(&pdata->lock);
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error = readq(base + PORT_ERROR);
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mutex_unlock(&pdata->lock);
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return sprintf(buf, "0x%llx\n", (unsigned long long)error);
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}
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static ssize_t errors_store(struct device *dev, struct device_attribute *attr,
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const char *buff, size_t count)
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{
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u64 value;
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int ret;
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if (kstrtou64(buff, 0, &value))
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return -EINVAL;
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ret = afu_port_err_clear(dev, value);
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return ret ? ret : count;
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}
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static DEVICE_ATTR_RW(errors);
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static ssize_t first_error_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);
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void __iomem *base;
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u64 error;
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base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_ERROR);
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mutex_lock(&pdata->lock);
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error = readq(base + PORT_FIRST_ERROR);
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mutex_unlock(&pdata->lock);
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return sprintf(buf, "0x%llx\n", (unsigned long long)error);
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}
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static DEVICE_ATTR_RO(first_error);
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static ssize_t first_malformed_req_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);
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void __iomem *base;
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u64 req0, req1;
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base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_ERROR);
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mutex_lock(&pdata->lock);
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req0 = readq(base + PORT_MALFORMED_REQ0);
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req1 = readq(base + PORT_MALFORMED_REQ1);
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mutex_unlock(&pdata->lock);
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return sprintf(buf, "0x%016llx%016llx\n",
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(unsigned long long)req1, (unsigned long long)req0);
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}
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static DEVICE_ATTR_RO(first_malformed_req);
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static struct attribute *port_err_attrs[] = {
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&dev_attr_errors.attr,
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&dev_attr_first_error.attr,
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&dev_attr_first_malformed_req.attr,
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NULL,
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};
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static umode_t port_err_attrs_visible(struct kobject *kobj,
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struct attribute *attr, int n)
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{
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struct device *dev = kobj_to_dev(kobj);
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/*
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* sysfs entries are visible only if related private feature is
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* enumerated.
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*/
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if (!dfl_get_feature_by_id(dev, PORT_FEATURE_ID_ERROR))
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return 0;
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return attr->mode;
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}
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const struct attribute_group port_err_group = {
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.name = "errors",
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.attrs = port_err_attrs,
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.is_visible = port_err_attrs_visible,
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};
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static int port_err_init(struct platform_device *pdev,
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struct dfl_feature *feature)
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{
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afu_port_err_mask(&pdev->dev, false);
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return 0;
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}
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static void port_err_uinit(struct platform_device *pdev,
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struct dfl_feature *feature)
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{
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afu_port_err_mask(&pdev->dev, true);
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}
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static long
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port_err_ioctl(struct platform_device *pdev, struct dfl_feature *feature,
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unsigned int cmd, unsigned long arg)
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{
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switch (cmd) {
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case DFL_FPGA_PORT_ERR_GET_IRQ_NUM:
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return dfl_feature_ioctl_get_num_irqs(pdev, feature, arg);
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case DFL_FPGA_PORT_ERR_SET_IRQ:
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return dfl_feature_ioctl_set_irq(pdev, feature, arg);
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default:
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dev_dbg(&pdev->dev, "%x cmd not handled", cmd);
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return -ENODEV;
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}
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}
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const struct dfl_feature_id port_err_id_table[] = {
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{.id = PORT_FEATURE_ID_ERROR,},
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{0,}
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};
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const struct dfl_feature_ops port_err_ops = {
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.init = port_err_init,
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.uinit = port_err_uinit,
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.ioctl = port_err_ioctl,
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};
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