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39eb3cc8ab
When checking the logs on my sun8i-a33-olinuxino I saw: sun8i-a23-r-pinctrl 1f02c00.pinctrl: Reset controller missing but this driver was working after. This message is just here because the reset controller was still not probed. So don't say anything if the return code say to wait. Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Link: https://lore.kernel.org/r/1585818532-23051-1-git-send-email-clabbe@baylibre.com Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
138 lines
4.3 KiB
C
138 lines
4.3 KiB
C
/*
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* Allwinner A23 SoCs special pins pinctrl driver.
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*
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* Copyright (C) 2014 Chen-Yu Tsai
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* Chen-Yu Tsai <wens@csie.org>
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*
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* Copyright (C) 2014 Boris Brezillon
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* Boris Brezillon <boris.brezillon@free-electrons.com>
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*
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* Copyright (C) 2014 Maxime Ripard
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/reset.h>
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#include "pinctrl-sunxi.h"
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static const struct sunxi_desc_pin sun8i_a23_r_pins[] = {
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_rsb"), /* SCK */
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SUNXI_FUNCTION(0x3, "s_i2c"), /* SCK */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 0)), /* PL_EINT0 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_rsb"), /* SDA */
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SUNXI_FUNCTION(0x3, "s_i2c"), /* SDA */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 1)), /* PL_EINT1 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_uart"), /* TX */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 2)), /* PL_EINT2 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_uart"), /* RX */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 3)), /* PL_EINT3 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "s_jtag"), /* MS */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 4)), /* PL_EINT4 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "s_jtag"), /* CK */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 5)), /* PL_EINT5 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "s_jtag"), /* DO */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 6)), /* PL_EINT6 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "s_jtag"), /* DI */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 7)), /* PL_EINT7 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_twi"), /* SCK */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 8)), /* PL_EINT8 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_twi"), /* SDA */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 9)), /* PL_EINT9 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_pwm"),
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 10)), /* PL_EINT10 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 11)), /* PL_EINT11 */
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};
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static const struct sunxi_pinctrl_desc sun8i_a23_r_pinctrl_data = {
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.pins = sun8i_a23_r_pins,
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.npins = ARRAY_SIZE(sun8i_a23_r_pins),
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.pin_base = PL_BASE,
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.irq_banks = 1,
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.disable_strict_mode = true,
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};
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static int sun8i_a23_r_pinctrl_probe(struct platform_device *pdev)
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{
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struct reset_control *rstc;
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int ret;
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rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
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if (IS_ERR(rstc)) {
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ret = PTR_ERR(rstc);
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if (ret == -EPROBE_DEFER)
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return ret;
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dev_err(&pdev->dev, "Reset controller missing err=%d\n", ret);
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return ret;
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}
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ret = reset_control_deassert(rstc);
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if (ret)
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return ret;
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ret = sunxi_pinctrl_init(pdev,
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&sun8i_a23_r_pinctrl_data);
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if (ret)
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reset_control_assert(rstc);
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return ret;
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}
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static const struct of_device_id sun8i_a23_r_pinctrl_match[] = {
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{ .compatible = "allwinner,sun8i-a23-r-pinctrl", },
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{}
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};
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static struct platform_driver sun8i_a23_r_pinctrl_driver = {
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.probe = sun8i_a23_r_pinctrl_probe,
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.driver = {
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.name = "sun8i-a23-r-pinctrl",
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.of_match_table = sun8i_a23_r_pinctrl_match,
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},
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};
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builtin_platform_driver(sun8i_a23_r_pinctrl_driver);
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