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![Waiman Long](/assets/img/avatar_default.png)
Arm64 has a more optimized spinning loop (atomic_cond_read_acquire) using wfe for spinlock that can boost performance of sibling threads by putting the current cpu to a wait state that is broken only when the monitored variable changes or an external event happens. OSQ has a more complicated spinning loop. Besides the lock value, it also checks for need_resched() and vcpu_is_preempted(). The check for need_resched() is not a problem as it is only set by the tick interrupt handler. That will be detected by the spinning cpu right after iret. The vcpu_is_preempted() check, however, is a problem as changes to the preempt state of of previous node will not affect the wait state. For ARM64, vcpu_is_preempted is not currently defined and so is a no-op. Will has indicated that he is planning to para-virtualize wfe instead of defining vcpu_is_preempted for PV support. So just add a comment in arch/arm64/include/asm/spinlock.h to indicate that vcpu_is_preempted() should not be defined as suggested. On a 2-socket 56-core 224-thread ARM64 system, a kernel mutex locking microbenchmark was run for 10s with and without the patch. The performance numbers before patch were: Running locktest with mutex [runtime = 10s, load = 1] Threads = 224, Min/Mean/Max = 316/123,143/2,121,269 Threads = 224, Total Rate = 2,757 kop/s; Percpu Rate = 12 kop/s After patch, the numbers were: Running locktest with mutex [runtime = 10s, load = 1] Threads = 224, Min/Mean/Max = 334/147,836/1,304,787 Threads = 224, Total Rate = 3,311 kop/s; Percpu Rate = 15 kop/s So there was about 20% performance improvement. Signed-off-by: Waiman Long <longman@redhat.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Will Deacon <will@kernel.org> Link: https://lkml.kernel.org/r/20200113150735.21956-1-longman@redhat.com
228 lines
5.7 KiB
C
228 lines
5.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/percpu.h>
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#include <linux/sched.h>
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#include <linux/osq_lock.h>
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/*
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* An MCS like lock especially tailored for optimistic spinning for sleeping
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* lock implementations (mutex, rwsem, etc).
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*
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* Using a single mcs node per CPU is safe because sleeping locks should not be
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* called from interrupt context and we have preemption disabled while
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* spinning.
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*/
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static DEFINE_PER_CPU_SHARED_ALIGNED(struct optimistic_spin_node, osq_node);
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/*
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* We use the value 0 to represent "no CPU", thus the encoded value
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* will be the CPU number incremented by 1.
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*/
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static inline int encode_cpu(int cpu_nr)
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{
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return cpu_nr + 1;
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}
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static inline int node_cpu(struct optimistic_spin_node *node)
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{
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return node->cpu - 1;
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}
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static inline struct optimistic_spin_node *decode_cpu(int encoded_cpu_val)
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{
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int cpu_nr = encoded_cpu_val - 1;
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return per_cpu_ptr(&osq_node, cpu_nr);
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}
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/*
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* Get a stable @node->next pointer, either for unlock() or unqueue() purposes.
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* Can return NULL in case we were the last queued and we updated @lock instead.
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*/
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static inline struct optimistic_spin_node *
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osq_wait_next(struct optimistic_spin_queue *lock,
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struct optimistic_spin_node *node,
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struct optimistic_spin_node *prev)
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{
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struct optimistic_spin_node *next = NULL;
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int curr = encode_cpu(smp_processor_id());
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int old;
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/*
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* If there is a prev node in queue, then the 'old' value will be
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* the prev node's CPU #, else it's set to OSQ_UNLOCKED_VAL since if
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* we're currently last in queue, then the queue will then become empty.
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*/
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old = prev ? prev->cpu : OSQ_UNLOCKED_VAL;
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for (;;) {
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if (atomic_read(&lock->tail) == curr &&
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atomic_cmpxchg_acquire(&lock->tail, curr, old) == curr) {
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/*
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* We were the last queued, we moved @lock back. @prev
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* will now observe @lock and will complete its
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* unlock()/unqueue().
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*/
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break;
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}
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/*
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* We must xchg() the @node->next value, because if we were to
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* leave it in, a concurrent unlock()/unqueue() from
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* @node->next might complete Step-A and think its @prev is
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* still valid.
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*
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* If the concurrent unlock()/unqueue() wins the race, we'll
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* wait for either @lock to point to us, through its Step-B, or
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* wait for a new @node->next from its Step-C.
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*/
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if (node->next) {
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next = xchg(&node->next, NULL);
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if (next)
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break;
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}
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cpu_relax();
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}
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return next;
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}
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bool osq_lock(struct optimistic_spin_queue *lock)
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{
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struct optimistic_spin_node *node = this_cpu_ptr(&osq_node);
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struct optimistic_spin_node *prev, *next;
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int curr = encode_cpu(smp_processor_id());
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int old;
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node->locked = 0;
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node->next = NULL;
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node->cpu = curr;
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/*
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* We need both ACQUIRE (pairs with corresponding RELEASE in
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* unlock() uncontended, or fastpath) and RELEASE (to publish
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* the node fields we just initialised) semantics when updating
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* the lock tail.
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*/
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old = atomic_xchg(&lock->tail, curr);
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if (old == OSQ_UNLOCKED_VAL)
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return true;
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prev = decode_cpu(old);
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node->prev = prev;
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/*
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* osq_lock() unqueue
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*
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* node->prev = prev osq_wait_next()
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* WMB MB
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* prev->next = node next->prev = prev // unqueue-C
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*
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* Here 'node->prev' and 'next->prev' are the same variable and we need
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* to ensure these stores happen in-order to avoid corrupting the list.
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*/
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smp_wmb();
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WRITE_ONCE(prev->next, node);
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/*
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* Normally @prev is untouchable after the above store; because at that
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* moment unlock can proceed and wipe the node element from stack.
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*
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* However, since our nodes are static per-cpu storage, we're
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* guaranteed their existence -- this allows us to apply
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* cmpxchg in an attempt to undo our queueing.
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*/
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/*
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* Wait to acquire the lock or cancelation. Note that need_resched()
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* will come with an IPI, which will wake smp_cond_load_relaxed() if it
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* is implemented with a monitor-wait. vcpu_is_preempted() relies on
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* polling, be careful.
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*/
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if (smp_cond_load_relaxed(&node->locked, VAL || need_resched() ||
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vcpu_is_preempted(node_cpu(node->prev))))
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return true;
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/* unqueue */
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/*
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* Step - A -- stabilize @prev
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*
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* Undo our @prev->next assignment; this will make @prev's
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* unlock()/unqueue() wait for a next pointer since @lock points to us
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* (or later).
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*/
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for (;;) {
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if (prev->next == node &&
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cmpxchg(&prev->next, node, NULL) == node)
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break;
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/*
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* We can only fail the cmpxchg() racing against an unlock(),
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* in which case we should observe @node->locked becomming
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* true.
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*/
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if (smp_load_acquire(&node->locked))
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return true;
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cpu_relax();
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/*
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* Or we race against a concurrent unqueue()'s step-B, in which
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* case its step-C will write us a new @node->prev pointer.
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*/
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prev = READ_ONCE(node->prev);
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}
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/*
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* Step - B -- stabilize @next
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*
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* Similar to unlock(), wait for @node->next or move @lock from @node
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* back to @prev.
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*/
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next = osq_wait_next(lock, node, prev);
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if (!next)
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return false;
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/*
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* Step - C -- unlink
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*
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* @prev is stable because its still waiting for a new @prev->next
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* pointer, @next is stable because our @node->next pointer is NULL and
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* it will wait in Step-A.
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*/
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WRITE_ONCE(next->prev, prev);
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WRITE_ONCE(prev->next, next);
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return false;
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}
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void osq_unlock(struct optimistic_spin_queue *lock)
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{
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struct optimistic_spin_node *node, *next;
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int curr = encode_cpu(smp_processor_id());
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/*
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* Fast path for the uncontended case.
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*/
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if (likely(atomic_cmpxchg_release(&lock->tail, curr,
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OSQ_UNLOCKED_VAL) == curr))
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return;
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/*
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* Second most likely case.
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*/
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node = this_cpu_ptr(&osq_node);
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next = xchg(&node->next, NULL);
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if (next) {
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WRITE_ONCE(next->locked, 1);
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return;
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}
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next = osq_wait_next(lock, node, NULL);
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if (next)
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WRITE_ONCE(next->locked, 1);
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}
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