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71c7a2d675
The patch adds the function of the PLL clock calculation to RL6231 shared support. Signed-off-by: Oder Chiou <oder_chiou@realtek.com> Signed-off-by: Mark Brown <broonie@linaro.org>
136 lines
3.1 KiB
C
136 lines
3.1 KiB
C
/*
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* rl6231.c - RL6231 class device shared support
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*
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* Copyright 2014 Realtek Semiconductor Corp.
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*
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* Author: Oder Chiou <oder_chiou@realtek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/gpio.h>
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#include <linux/i2c.h>
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#include <linux/regmap.h>
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#include <linux/of.h>
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#include <linux/of_gpio.h>
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <linux/acpi.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dapm.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include "rl6231.h"
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/**
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* rl6231_calc_dmic_clk - Calculate the parameter of dmic.
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*
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* @rate: base clock rate.
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*
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* Choose dmic clock between 1MHz and 3MHz.
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* It is better for clock to approximate 3MHz.
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*/
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int rl6231_calc_dmic_clk(int rate)
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{
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int div[] = {2, 3, 4, 6, 8, 12}, idx = -EINVAL;
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int i, red, bound, temp;
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red = 3000000 * 12;
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for (i = 0; i < ARRAY_SIZE(div); i++) {
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bound = div[i] * 3000000;
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if (rate > bound)
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continue;
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temp = bound - rate;
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if (temp < red) {
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red = temp;
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idx = i;
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}
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}
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return idx;
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}
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EXPORT_SYMBOL_GPL(rl6231_calc_dmic_clk);
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/**
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* rl6231_pll_calc - Calcualte PLL M/N/K code.
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* @freq_in: external clock provided to codec.
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* @freq_out: target clock which codec works on.
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* @pll_code: Pointer to structure with M, N, K and bypass flag.
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*
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* Calcualte M/N/K code to configure PLL for codec.
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*
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* Returns 0 for success or negative error code.
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*/
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int rl6231_pll_calc(const unsigned int freq_in,
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const unsigned int freq_out, struct rl6231_pll_code *pll_code)
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{
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int max_n = RL6231_PLL_N_MAX, max_m = RL6231_PLL_M_MAX;
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int k, red, n_t, pll_out, in_t, out_t;
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int n = 0, m = 0, m_t = 0;
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int red_t = abs(freq_out - freq_in);
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bool bypass = false;
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if (RL6231_PLL_INP_MAX < freq_in || RL6231_PLL_INP_MIN > freq_in)
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return -EINVAL;
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k = 100000000 / freq_out - 2;
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if (k > RL6231_PLL_K_MAX)
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k = RL6231_PLL_K_MAX;
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for (n_t = 0; n_t <= max_n; n_t++) {
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in_t = freq_in / (k + 2);
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pll_out = freq_out / (n_t + 2);
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if (in_t < 0)
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continue;
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if (in_t == pll_out) {
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bypass = true;
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n = n_t;
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goto code_find;
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}
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red = abs(in_t - pll_out);
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if (red < red_t) {
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bypass = true;
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n = n_t;
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m = m_t;
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if (red == 0)
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goto code_find;
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red_t = red;
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}
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for (m_t = 0; m_t <= max_m; m_t++) {
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out_t = in_t / (m_t + 2);
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red = abs(out_t - pll_out);
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if (red < red_t) {
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bypass = false;
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n = n_t;
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m = m_t;
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if (red == 0)
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goto code_find;
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red_t = red;
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}
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}
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}
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pr_debug("Only get approximation about PLL\n");
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code_find:
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pll_code->m_bp = bypass;
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pll_code->m_code = m;
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pll_code->n_code = n;
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pll_code->k_code = k;
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return 0;
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}
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EXPORT_SYMBOL_GPL(rl6231_pll_calc);
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MODULE_DESCRIPTION("RL6231 class device shared support");
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MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>");
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MODULE_LICENSE("GPL v2");
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