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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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c3eb5b1444
Finally plug KVM/arm64 into the config system, making it possible to enable KVM support on AArch64 CPUs. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
142 lines
6.6 KiB
C
142 lines
6.6 KiB
C
/*
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* Based on arch/arm/kernel/asm-offsets.c
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*
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* Copyright (C) 1995-2003 Russell King
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* 2001-2002 Keith Owens
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/dma-mapping.h>
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#include <linux/kvm_host.h>
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#include <asm/thread_info.h>
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#include <asm/memory.h>
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#include <asm/cputable.h>
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#include <asm/vdso_datapage.h>
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#include <linux/kbuild.h>
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int main(void)
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{
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DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
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BLANK();
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DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
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DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
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DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
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DEFINE(TI_TASK, offsetof(struct thread_info, task));
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DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain));
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DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
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BLANK();
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DEFINE(THREAD_CPU_CONTEXT, offsetof(struct task_struct, thread.cpu_context));
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BLANK();
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DEFINE(S_X0, offsetof(struct pt_regs, regs[0]));
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DEFINE(S_X1, offsetof(struct pt_regs, regs[1]));
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DEFINE(S_X2, offsetof(struct pt_regs, regs[2]));
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DEFINE(S_X3, offsetof(struct pt_regs, regs[3]));
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DEFINE(S_X4, offsetof(struct pt_regs, regs[4]));
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DEFINE(S_X5, offsetof(struct pt_regs, regs[5]));
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DEFINE(S_X6, offsetof(struct pt_regs, regs[6]));
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DEFINE(S_X7, offsetof(struct pt_regs, regs[7]));
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DEFINE(S_LR, offsetof(struct pt_regs, regs[30]));
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DEFINE(S_SP, offsetof(struct pt_regs, sp));
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#ifdef CONFIG_COMPAT
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DEFINE(S_COMPAT_SP, offsetof(struct pt_regs, compat_sp));
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#endif
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DEFINE(S_PSTATE, offsetof(struct pt_regs, pstate));
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DEFINE(S_PC, offsetof(struct pt_regs, pc));
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DEFINE(S_ORIG_X0, offsetof(struct pt_regs, orig_x0));
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DEFINE(S_SYSCALLNO, offsetof(struct pt_regs, syscallno));
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DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
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BLANK();
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DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id));
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BLANK();
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DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
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DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
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BLANK();
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DEFINE(VM_EXEC, VM_EXEC);
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BLANK();
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DEFINE(PAGE_SZ, PAGE_SIZE);
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BLANK();
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DEFINE(CPU_INFO_SZ, sizeof(struct cpu_info));
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DEFINE(CPU_INFO_SETUP, offsetof(struct cpu_info, cpu_setup));
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BLANK();
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DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
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DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
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DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
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BLANK();
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DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
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DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
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DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
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DEFINE(CLOCK_REALTIME_COARSE, CLOCK_REALTIME_COARSE);
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DEFINE(CLOCK_MONOTONIC_COARSE,CLOCK_MONOTONIC_COARSE);
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DEFINE(CLOCK_COARSE_RES, LOW_RES_NSEC);
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DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
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BLANK();
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DEFINE(VDSO_CS_CYCLE_LAST, offsetof(struct vdso_data, cs_cycle_last));
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DEFINE(VDSO_XTIME_CLK_SEC, offsetof(struct vdso_data, xtime_clock_sec));
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DEFINE(VDSO_XTIME_CLK_NSEC, offsetof(struct vdso_data, xtime_clock_nsec));
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DEFINE(VDSO_XTIME_CRS_SEC, offsetof(struct vdso_data, xtime_coarse_sec));
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DEFINE(VDSO_XTIME_CRS_NSEC, offsetof(struct vdso_data, xtime_coarse_nsec));
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DEFINE(VDSO_WTM_CLK_SEC, offsetof(struct vdso_data, wtm_clock_sec));
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DEFINE(VDSO_WTM_CLK_NSEC, offsetof(struct vdso_data, wtm_clock_nsec));
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DEFINE(VDSO_TB_SEQ_COUNT, offsetof(struct vdso_data, tb_seq_count));
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DEFINE(VDSO_CS_MULT, offsetof(struct vdso_data, cs_mult));
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DEFINE(VDSO_CS_SHIFT, offsetof(struct vdso_data, cs_shift));
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DEFINE(VDSO_TZ_MINWEST, offsetof(struct vdso_data, tz_minuteswest));
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DEFINE(VDSO_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
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DEFINE(VDSO_USE_SYSCALL, offsetof(struct vdso_data, use_syscall));
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BLANK();
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DEFINE(TVAL_TV_SEC, offsetof(struct timeval, tv_sec));
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DEFINE(TVAL_TV_USEC, offsetof(struct timeval, tv_usec));
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DEFINE(TSPEC_TV_SEC, offsetof(struct timespec, tv_sec));
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DEFINE(TSPEC_TV_NSEC, offsetof(struct timespec, tv_nsec));
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BLANK();
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DEFINE(TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
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DEFINE(TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
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BLANK();
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#ifdef CONFIG_KVM_ARM_HOST
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DEFINE(VCPU_CONTEXT, offsetof(struct kvm_vcpu, arch.ctxt));
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DEFINE(CPU_GP_REGS, offsetof(struct kvm_cpu_context, gp_regs));
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DEFINE(CPU_USER_PT_REGS, offsetof(struct kvm_regs, regs));
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DEFINE(CPU_FP_REGS, offsetof(struct kvm_regs, fp_regs));
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DEFINE(CPU_SP_EL1, offsetof(struct kvm_regs, sp_el1));
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DEFINE(CPU_ELR_EL1, offsetof(struct kvm_regs, elr_el1));
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DEFINE(CPU_SPSR, offsetof(struct kvm_regs, spsr));
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DEFINE(CPU_SYSREGS, offsetof(struct kvm_cpu_context, sys_regs));
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DEFINE(VCPU_ESR_EL2, offsetof(struct kvm_vcpu, arch.fault.esr_el2));
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DEFINE(VCPU_FAR_EL2, offsetof(struct kvm_vcpu, arch.fault.far_el2));
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DEFINE(VCPU_HPFAR_EL2, offsetof(struct kvm_vcpu, arch.fault.hpfar_el2));
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DEFINE(VCPU_HCR_EL2, offsetof(struct kvm_vcpu, arch.hcr_el2));
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DEFINE(VCPU_IRQ_LINES, offsetof(struct kvm_vcpu, arch.irq_lines));
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DEFINE(VCPU_HOST_CONTEXT, offsetof(struct kvm_vcpu, arch.host_cpu_context));
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DEFINE(VCPU_TIMER_CNTV_CTL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_ctl));
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DEFINE(VCPU_TIMER_CNTV_CVAL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_cval));
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DEFINE(KVM_TIMER_CNTVOFF, offsetof(struct kvm, arch.timer.cntvoff));
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DEFINE(KVM_TIMER_ENABLED, offsetof(struct kvm, arch.timer.enabled));
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DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));
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DEFINE(VCPU_VGIC_CPU, offsetof(struct kvm_vcpu, arch.vgic_cpu));
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DEFINE(VGIC_CPU_HCR, offsetof(struct vgic_cpu, vgic_hcr));
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DEFINE(VGIC_CPU_VMCR, offsetof(struct vgic_cpu, vgic_vmcr));
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DEFINE(VGIC_CPU_MISR, offsetof(struct vgic_cpu, vgic_misr));
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DEFINE(VGIC_CPU_EISR, offsetof(struct vgic_cpu, vgic_eisr));
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DEFINE(VGIC_CPU_ELRSR, offsetof(struct vgic_cpu, vgic_elrsr));
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DEFINE(VGIC_CPU_APR, offsetof(struct vgic_cpu, vgic_apr));
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DEFINE(VGIC_CPU_LR, offsetof(struct vgic_cpu, vgic_lr));
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DEFINE(VGIC_CPU_NR_LR, offsetof(struct vgic_cpu, nr_lr));
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DEFINE(KVM_VTTBR, offsetof(struct kvm, arch.vttbr));
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DEFINE(KVM_VGIC_VCTRL, offsetof(struct kvm, arch.vgic.vctrl_base));
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#endif
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return 0;
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}
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