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06c7654d2f
Enable handling of CPU specific 32bit coprocessor access. Not much here either. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
95 lines
2.7 KiB
C
95 lines
2.7 KiB
C
/*
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* Copyright (C) 2012,2013 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* Based on arch/arm/kvm/coproc_a15.c:
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Authors: Rusty Russell <rusty@rustcorp.au>
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* Christoffer Dall <c.dall@virtualopensystems.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/kvm_host.h>
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#include <asm/cputype.h>
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#include <asm/kvm_arm.h>
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#include <asm/kvm_asm.h>
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#include <asm/kvm_host.h>
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#include <asm/kvm_emulate.h>
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#include <asm/kvm_coproc.h>
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#include <linux/init.h>
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#include "sys_regs.h"
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static bool access_actlr(struct kvm_vcpu *vcpu,
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const struct sys_reg_params *p,
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const struct sys_reg_desc *r)
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{
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if (p->is_write)
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return ignore_write(vcpu, p);
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*vcpu_reg(vcpu, p->Rt) = vcpu_sys_reg(vcpu, ACTLR_EL1);
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return true;
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}
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static void reset_actlr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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{
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u64 actlr;
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asm volatile("mrs %0, actlr_el1\n" : "=r" (actlr));
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vcpu_sys_reg(vcpu, ACTLR_EL1) = actlr;
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}
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/*
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* Implementation specific sys-reg registers.
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* Important: Must be sorted ascending by Op0, Op1, CRn, CRm, Op2
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*/
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static const struct sys_reg_desc genericv8_sys_regs[] = {
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/* ACTLR_EL1 */
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{ Op0(0b11), Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001),
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access_actlr, reset_actlr, ACTLR_EL1 },
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};
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static const struct sys_reg_desc genericv8_cp15_regs[] = {
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/* ACTLR */
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{ Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001),
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access_actlr },
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};
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static struct kvm_sys_reg_target_table genericv8_target_table = {
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.table64 = {
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.table = genericv8_sys_regs,
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.num = ARRAY_SIZE(genericv8_sys_regs),
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},
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.table32 = {
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.table = genericv8_cp15_regs,
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.num = ARRAY_SIZE(genericv8_cp15_regs),
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},
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};
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static int __init sys_reg_genericv8_init(void)
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{
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unsigned int i;
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for (i = 1; i < ARRAY_SIZE(genericv8_sys_regs); i++)
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BUG_ON(cmp_sys_reg(&genericv8_sys_regs[i-1],
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&genericv8_sys_regs[i]) >= 0);
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kvm_register_target_sys_reg_table(KVM_ARM_TARGET_AEM_V8,
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&genericv8_target_table);
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kvm_register_target_sys_reg_table(KVM_ARM_TARGET_FOUNDATION_V8,
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&genericv8_target_table);
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kvm_register_target_sys_reg_table(KVM_ARM_TARGET_CORTEX_A57,
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&genericv8_target_table);
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return 0;
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}
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late_initcall(sys_reg_genericv8_init);
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