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The D1 CCU contains gates and resets for two CAN buses. While the CAN bus controllers are only documented for the T113 SoC, the CCU is the same across all SoC variants. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221231231429.18357-6-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
79 lines
2 KiB
C
79 lines
2 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
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/*
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* Copyright (c) 2020 huangzhenwei@allwinnertech.com
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* Copyright (C) 2021 Samuel Holland <samuel@sholland.org>
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*/
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#ifndef _DT_BINDINGS_RST_SUN20I_D1_CCU_H_
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#define _DT_BINDINGS_RST_SUN20I_D1_CCU_H_
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#define RST_MBUS 0
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#define RST_BUS_DE 1
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#define RST_BUS_DI 2
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#define RST_BUS_G2D 3
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#define RST_BUS_CE 4
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#define RST_BUS_VE 5
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#define RST_BUS_DMA 6
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#define RST_BUS_MSGBOX0 7
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#define RST_BUS_MSGBOX1 8
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#define RST_BUS_MSGBOX2 9
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#define RST_BUS_SPINLOCK 10
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#define RST_BUS_HSTIMER 11
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#define RST_BUS_DBG 12
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#define RST_BUS_PWM 13
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#define RST_BUS_DRAM 14
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#define RST_BUS_MMC0 15
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#define RST_BUS_MMC1 16
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#define RST_BUS_MMC2 17
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#define RST_BUS_UART0 18
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#define RST_BUS_UART1 19
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#define RST_BUS_UART2 20
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#define RST_BUS_UART3 21
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#define RST_BUS_UART4 22
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#define RST_BUS_UART5 23
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#define RST_BUS_I2C0 24
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#define RST_BUS_I2C1 25
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#define RST_BUS_I2C2 26
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#define RST_BUS_I2C3 27
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#define RST_BUS_SPI0 28
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#define RST_BUS_SPI1 29
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#define RST_BUS_EMAC 30
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#define RST_BUS_IR_TX 31
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#define RST_BUS_GPADC 32
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#define RST_BUS_THS 33
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#define RST_BUS_I2S0 34
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#define RST_BUS_I2S1 35
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#define RST_BUS_I2S2 36
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#define RST_BUS_SPDIF 37
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#define RST_BUS_DMIC 38
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#define RST_BUS_AUDIO 39
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#define RST_USB_PHY0 40
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#define RST_USB_PHY1 41
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#define RST_BUS_OHCI0 42
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#define RST_BUS_OHCI1 43
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#define RST_BUS_EHCI0 44
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#define RST_BUS_EHCI1 45
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#define RST_BUS_OTG 46
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#define RST_BUS_LRADC 47
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#define RST_BUS_DPSS_TOP 48
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#define RST_BUS_HDMI_SUB 49
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#define RST_BUS_HDMI_MAIN 50
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#define RST_BUS_MIPI_DSI 51
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#define RST_BUS_TCON_LCD0 52
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#define RST_BUS_TCON_TV 53
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#define RST_BUS_LVDS0 54
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#define RST_BUS_TVE 55
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#define RST_BUS_TVE_TOP 56
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#define RST_BUS_TVD 57
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#define RST_BUS_TVD_TOP 58
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#define RST_BUS_LEDC 59
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#define RST_BUS_CSI 60
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#define RST_BUS_TPADC 61
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#define RST_DSP 62
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#define RST_BUS_DSP_CFG 63
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#define RST_BUS_DSP_DBG 64
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#define RST_BUS_RISCV_CFG 65
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#define RST_BUS_CAN0 66
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#define RST_BUS_CAN1 67
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#endif /* _DT_BINDINGS_RST_SUN20I_D1_CCU_H_ */
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