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378ed6f0e3
We currently have 2 commonly used methods for switching ISA within
assembly code, then restoring the original ISA.
1) Using a pair of .set push & .set pop directives. For example:
.set push
.set mips32r2
<some_insn>
.set pop
2) Using .set mips0 to restore the ISA originally specified on the
command line. For example:
.set mips32r2
<some_insn>
.set mips0
Unfortunately method 2 does not work with nanoMIPS toolchains, where the
assembler rejects the .set mips0 directive like so:
Error: cannot change ISA from nanoMIPS to mips0
In preparation for supporting nanoMIPS builds, switch all instances of
method 2 in generic non-platform-specific code to use push & pop as in
method 1 instead. The .set push & .set pop is arguably cleaner anyway,
and if nothing else it's good to consistently use one method.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/21037/
Cc: linux-mips@linux-mips.org
38 lines
839 B
C
38 lines
839 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef ASM_EDAC_H
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#define ASM_EDAC_H
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#include <asm/compiler.h>
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/* ECC atomic, DMA, SMP and interrupt safe scrub function */
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static inline void edac_atomic_scrub(void *va, u32 size)
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{
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unsigned long *virt_addr = va;
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unsigned long temp;
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u32 i;
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for (i = 0; i < size / sizeof(unsigned long); i++) {
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/*
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* Very carefully read and write to memory atomically
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* so we are interrupt, DMA and SMP safe.
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*
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* Intel: asm("lock; addl $0, %0"::"m"(*virt_addr));
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*/
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__asm__ __volatile__ (
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" .set push \n"
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" .set mips2 \n"
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"1: ll %0, %1 # edac_atomic_scrub \n"
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" addu %0, $0 \n"
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" sc %0, %1 \n"
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" beqz %0, 1b \n"
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" .set pop \n"
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: "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*virt_addr)
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: GCC_OFF_SMALL_ASM() (*virt_addr));
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virt_addr++;
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}
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}
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#endif
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