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5fdc66e046
Commitdb8466c581("MIPS: IRQ Stack: Unwind IRQ stack onto task stack") erroneously set the initial stack pointer of the IRQ stack to a value with a 4 byte alignment. The MIPS32 ABI requires that the minimum stack alignment is 8 byte, and the MIPS64 ABIs(n32/n64) require 16 byte minimum alignment. Fix IRQ_STACK_START such that it leaves space for the dummy stack frame (containing interrupted task kernel stack pointer) while also meeting minimum alignment requirements. Fixes:db8466c581("MIPS: IRQ Stack: Unwind IRQ stack onto task stack") Reported-by: Darius Ivanauskas <dasilt@yahoo.com> Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Chris Metcalf <cmetcalf@mellanox.com> Cc: Petr Mladek <pmladek@suse.com> Cc: Aaron Tomlin <atomlin@redhat.com> Cc: Jason A. Donenfeld <jason@zx2c4.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16760/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
85 lines
2.3 KiB
C
85 lines
2.3 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994 by Waldorf GMBH, written by Ralf Baechle
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* Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle
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*/
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#ifndef _ASM_IRQ_H
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#define _ASM_IRQ_H
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#include <linux/linkage.h>
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#include <linux/smp.h>
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#include <linux/irqdomain.h>
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#include <asm/mipsmtregs.h>
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#include <irq.h>
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#define IRQ_STACK_SIZE THREAD_SIZE
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#define IRQ_STACK_START (IRQ_STACK_SIZE - 16)
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extern void *irq_stack[NR_CPUS];
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/*
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* The highest address on the IRQ stack contains a dummy frame put down in
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* genex.S (handle_int & except_vec_vi_handler) which is structured as follows:
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*
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* top ------------
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* | task sp | <- irq_stack[cpu] + IRQ_STACK_START
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* ------------
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* | | <- First frame of IRQ context
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* ------------
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*
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* task sp holds a copy of the task stack pointer where the struct pt_regs
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* from exception entry can be found.
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*/
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static inline bool on_irq_stack(int cpu, unsigned long sp)
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{
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unsigned long low = (unsigned long)irq_stack[cpu];
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unsigned long high = low + IRQ_STACK_SIZE;
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return (low <= sp && sp <= high);
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}
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#ifdef CONFIG_I8259
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static inline int irq_canonicalize(int irq)
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{
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return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq);
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}
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#else
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#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
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#endif
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asmlinkage void plat_irq_dispatch(void);
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extern void do_IRQ(unsigned int irq);
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extern void arch_init_irq(void);
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extern void spurious_interrupt(void);
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extern int allocate_irqno(void);
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extern void alloc_legacy_irqno(void);
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extern void free_irqno(unsigned int irq);
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/*
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* Before R2 the timer and performance counter interrupts were both fixed to
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* IE7. Since R2 their number has to be read from the c0_intctl register.
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*/
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#define CP0_LEGACY_COMPARE_IRQ 7
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#define CP0_LEGACY_PERFCNT_IRQ 7
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extern int cp0_compare_irq;
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extern int cp0_compare_irq_shift;
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extern int cp0_perfcount_irq;
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extern int cp0_fdc_irq;
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extern int get_c0_fdc_int(void);
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void arch_trigger_cpumask_backtrace(const struct cpumask *mask,
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bool exclude_self);
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#define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace
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#endif /* _ASM_IRQ_H */
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