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dec85a9516
With the board file support gone, and the platform using DT only, a lot of the remaining code is no longer referenced and can be removed. Technically, the DT file only references DA850, but since that is very similar to DA830, I'm leaving the latter. Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
82 lines
2.5 KiB
C
82 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Chip specific defines for DA8XX/OMAP L1XX SoC
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*
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* Author: Mark A. Greer <mgreer@mvista.com>
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*
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* 2007, 2009-2010 (c) MontaVista Software, Inc.
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*/
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#ifndef __ASM_ARCH_DAVINCI_DA8XX_H
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#define __ASM_ARCH_DAVINCI_DA8XX_H
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#include <linux/dma-mapping.h>
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#include <linux/platform_device.h>
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#include <linux/videodev2.h>
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#include <linux/reboot.h>
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#include <linux/regmap.h>
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#include "hardware.h"
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#include "pm.h"
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#include <media/davinci/vpif_types.h>
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extern void __iomem *da8xx_syscfg0_base;
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extern void __iomem *da8xx_syscfg1_base;
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/*
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* The cp_intc interrupt controller for the da8xx isn't in the same
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* chunk of physical memory space as the other registers (like it is
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* on the davincis) so it needs to be mapped separately. It will be
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* mapped early on when the I/O space is mapped and we'll put it just
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* before the I/O space in the processor's virtual memory space.
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*/
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#define DA8XX_CP_INTC_BASE 0xfffee000
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#define DA8XX_CP_INTC_SIZE SZ_8K
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#define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
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#define DA8XX_SYSCFG0_BASE (IO_PHYS + 0x14000)
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#define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x))
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#define DA8XX_JTAG_ID_REG 0x18
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#define DA8XX_HOST1CFG_REG 0x44
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#define DA8XX_CHIPSIG_REG 0x174
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#define DA8XX_CFGCHIP0_REG 0x17c
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#define DA8XX_CFGCHIP1_REG 0x180
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#define DA8XX_CFGCHIP2_REG 0x184
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#define DA8XX_CFGCHIP3_REG 0x188
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#define DA8XX_CFGCHIP4_REG 0x18c
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#define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000)
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#define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x))
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#define DA8XX_DEEPSLEEP_REG 0x8
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#define DA8XX_PWRDN_REG 0x18
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#define DA8XX_PSC0_BASE 0x01c10000
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#define DA8XX_PLL0_BASE 0x01c11000
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#define DA8XX_TIMER64P0_BASE 0x01c20000
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#define DA8XX_TIMER64P1_BASE 0x01c21000
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#define DA8XX_VPIF_BASE 0x01e17000
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#define DA8XX_GPIO_BASE 0x01e26000
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#define DA8XX_PSC1_BASE 0x01e27000
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#define DA8XX_DSP_L2_RAM_BASE 0x11800000
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#define DA8XX_DSP_L1P_RAM_BASE (DA8XX_DSP_L2_RAM_BASE + 0x600000)
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#define DA8XX_DSP_L1D_RAM_BASE (DA8XX_DSP_L2_RAM_BASE + 0x700000)
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#define DA8XX_AEMIF_CS2_BASE 0x60000000
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#define DA8XX_AEMIF_CS3_BASE 0x62000000
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#define DA8XX_AEMIF_CTL_BASE 0x68000000
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#define DA8XX_SHARED_RAM_BASE 0x80000000
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#define DA8XX_ARM_RAM_BASE 0xffff0000
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void da830_init(void);
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void da850_init(void);
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int da850_register_vpif_display
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(struct vpif_display_config *display_config);
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int da850_register_vpif_capture
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(struct vpif_capture_config *capture_config);
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struct regmap *da8xx_get_cfgchip(void);
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void __iomem *da8xx_get_mem_ctlr(void);
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#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */
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