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![Michel Pollet](/assets/img/avatar_default.png)
This provides a clock driver for the Renesas R09A06G032. This uses a structure derived from both the R-Car Gen2 driver as well as the renesas-cpg-mssr driver. Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
35 lines
1.4 KiB
Makefile
35 lines
1.4 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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# SoC
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obj-$(CONFIG_CLK_EMEV2) += clk-emev2.o
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obj-$(CONFIG_CLK_RZA1) += clk-rz.o
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obj-$(CONFIG_CLK_R8A73A4) += clk-r8a73a4.o
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obj-$(CONFIG_CLK_R8A7740) += clk-r8a7740.o
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obj-$(CONFIG_CLK_R8A7743) += r8a7743-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A7745) += r8a7745-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A77470) += r8a77470-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A7778) += clk-r8a7778.o
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obj-$(CONFIG_CLK_R8A7779) += clk-r8a7779.o
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obj-$(CONFIG_CLK_R8A7790) += r8a7790-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A7791) += r8a7791-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A7792) += r8a7792-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A7794) += r8a7794-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A7795) += r8a7795-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A7796) += r8a7796-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A77965) += r8a77965-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A77970) += r8a77970-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A77980) += r8a77980-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A77990) += r8a77990-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A77995) += r8a77995-cpg-mssr.o
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obj-$(CONFIG_CLK_R9A06G032) += r9a06g032-clocks.o
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obj-$(CONFIG_CLK_SH73A0) += clk-sh73a0.o
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# Family
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obj-$(CONFIG_CLK_RCAR_GEN2) += clk-rcar-gen2.o
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obj-$(CONFIG_CLK_RCAR_GEN2_CPG) += rcar-gen2-cpg.o
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obj-$(CONFIG_CLK_RCAR_GEN3_CPG) += rcar-gen3-cpg.o
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obj-$(CONFIG_CLK_RCAR_USB2_CLOCK_SEL) += rcar-usb2-clock-sel.o
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# Generic
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obj-$(CONFIG_CLK_RENESAS_CPG_MSSR) += renesas-cpg-mssr.o
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obj-$(CONFIG_CLK_RENESAS_CPG_MSTP) += clk-mstp.o
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obj-$(CONFIG_CLK_RENESAS_DIV6) += clk-div6.o
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