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![Tero Kristo](/assets/img/avatar_default.png)
Certain clocks require latching to be done, so that the actual settings get updated on the HW that generates the clock signal. One example of such a clock is the dra76x GMAC DPLL H14 output, which requires its divider settings to be latched when updated. Signed-off-by: Tero Kristo <t-kristo@ti.com>
511 lines
12 KiB
C
511 lines
12 KiB
C
/*
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* TI clock support
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*
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* Copyright (C) 2013 Texas Instruments, Inc.
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*
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* Tero Kristo <t-kristo@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/clkdev.h>
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#include <linux/clk/ti.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/list.h>
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#include <linux/regmap.h>
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#include <linux/bootmem.h>
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#include <linux/device.h>
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#include "clock.h"
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#undef pr_fmt
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#define pr_fmt(fmt) "%s: " fmt, __func__
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struct ti_clk_ll_ops *ti_clk_ll_ops;
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static struct device_node *clocks_node_ptr[CLK_MAX_MEMMAPS];
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static struct ti_clk_features ti_clk_features;
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struct clk_iomap {
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struct regmap *regmap;
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void __iomem *mem;
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};
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static struct clk_iomap *clk_memmaps[CLK_MAX_MEMMAPS];
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static void clk_memmap_writel(u32 val, const struct clk_omap_reg *reg)
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{
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struct clk_iomap *io = clk_memmaps[reg->index];
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if (reg->ptr)
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writel_relaxed(val, reg->ptr);
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else if (io->regmap)
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regmap_write(io->regmap, reg->offset, val);
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else
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writel_relaxed(val, io->mem + reg->offset);
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}
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static void _clk_rmw(u32 val, u32 mask, void __iomem *ptr)
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{
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u32 v;
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v = readl_relaxed(ptr);
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v &= ~mask;
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v |= val;
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writel_relaxed(v, ptr);
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}
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static void clk_memmap_rmw(u32 val, u32 mask, const struct clk_omap_reg *reg)
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{
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struct clk_iomap *io = clk_memmaps[reg->index];
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if (reg->ptr) {
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_clk_rmw(val, mask, reg->ptr);
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} else if (io->regmap) {
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regmap_update_bits(io->regmap, reg->offset, mask, val);
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} else {
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_clk_rmw(val, mask, io->mem + reg->offset);
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}
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}
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static u32 clk_memmap_readl(const struct clk_omap_reg *reg)
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{
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u32 val;
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struct clk_iomap *io = clk_memmaps[reg->index];
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if (reg->ptr)
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val = readl_relaxed(reg->ptr);
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else if (io->regmap)
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regmap_read(io->regmap, reg->offset, &val);
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else
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val = readl_relaxed(io->mem + reg->offset);
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return val;
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}
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/**
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* ti_clk_setup_ll_ops - setup low level clock operations
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* @ops: low level clock ops descriptor
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*
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* Sets up low level clock operations for TI clock driver. This is used
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* to provide various callbacks for the clock driver towards platform
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* specific code. Returns 0 on success, -EBUSY if ll_ops have been
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* registered already.
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*/
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int ti_clk_setup_ll_ops(struct ti_clk_ll_ops *ops)
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{
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if (ti_clk_ll_ops) {
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pr_err("Attempt to register ll_ops multiple times.\n");
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return -EBUSY;
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}
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ti_clk_ll_ops = ops;
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ops->clk_readl = clk_memmap_readl;
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ops->clk_writel = clk_memmap_writel;
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ops->clk_rmw = clk_memmap_rmw;
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return 0;
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}
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/**
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* ti_dt_clocks_register - register DT alias clocks during boot
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* @oclks: list of clocks to register
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*
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* Register alias or non-standard DT clock entries during boot. By
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* default, DT clocks are found based on their node name. If any
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* additional con-id / dev-id -> clock mapping is required, use this
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* function to list these.
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*/
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void __init ti_dt_clocks_register(struct ti_dt_clk oclks[])
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{
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struct ti_dt_clk *c;
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struct device_node *node;
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struct clk *clk;
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struct of_phandle_args clkspec;
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char buf[64];
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char *ptr;
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char *tags[2];
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int i;
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int num_args;
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int ret;
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static bool clkctrl_nodes_missing;
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static bool has_clkctrl_data;
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for (c = oclks; c->node_name != NULL; c++) {
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strcpy(buf, c->node_name);
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ptr = buf;
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for (i = 0; i < 2; i++)
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tags[i] = NULL;
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num_args = 0;
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while (*ptr) {
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if (*ptr == ':') {
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if (num_args >= 2) {
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pr_warn("Bad number of tags on %s\n",
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c->node_name);
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return;
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}
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tags[num_args++] = ptr + 1;
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*ptr = 0;
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}
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ptr++;
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}
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if (num_args && clkctrl_nodes_missing)
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continue;
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node = of_find_node_by_name(NULL, buf);
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if (num_args)
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node = of_find_node_by_name(node, "clk");
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clkspec.np = node;
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clkspec.args_count = num_args;
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for (i = 0; i < num_args; i++) {
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ret = kstrtoint(tags[i], i ? 10 : 16, clkspec.args + i);
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if (ret) {
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pr_warn("Bad tag in %s at %d: %s\n",
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c->node_name, i, tags[i]);
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return;
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}
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}
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clk = of_clk_get_from_provider(&clkspec);
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if (!IS_ERR(clk)) {
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c->lk.clk = clk;
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clkdev_add(&c->lk);
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} else {
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if (num_args && !has_clkctrl_data) {
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if (of_find_compatible_node(NULL, NULL,
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"ti,clkctrl")) {
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has_clkctrl_data = true;
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} else {
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clkctrl_nodes_missing = true;
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pr_warn("missing clkctrl nodes, please update your dts.\n");
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continue;
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}
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}
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pr_warn("failed to lookup clock node %s, ret=%ld\n",
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c->node_name, PTR_ERR(clk));
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}
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}
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}
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struct clk_init_item {
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struct device_node *node;
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void *user;
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ti_of_clk_init_cb_t func;
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struct list_head link;
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};
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static LIST_HEAD(retry_list);
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/**
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* ti_clk_retry_init - retries a failed clock init at later phase
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* @node: device not for the clock
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* @user: user data pointer
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* @func: init function to be called for the clock
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*
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* Adds a failed clock init to the retry list. The retry list is parsed
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* once all the other clocks have been initialized.
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*/
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int __init ti_clk_retry_init(struct device_node *node, void *user,
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ti_of_clk_init_cb_t func)
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{
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struct clk_init_item *retry;
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pr_debug("%s: adding to retry list...\n", node->name);
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retry = kzalloc(sizeof(*retry), GFP_KERNEL);
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if (!retry)
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return -ENOMEM;
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retry->node = node;
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retry->func = func;
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retry->user = user;
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list_add(&retry->link, &retry_list);
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return 0;
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}
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/**
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* ti_clk_get_reg_addr - get register address for a clock register
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* @node: device node for the clock
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* @index: register index from the clock node
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* @reg: pointer to target register struct
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*
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* Builds clock register address from device tree information, and returns
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* the data via the provided output pointer @reg. Returns 0 on success,
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* negative error value on failure.
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*/
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int ti_clk_get_reg_addr(struct device_node *node, int index,
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struct clk_omap_reg *reg)
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{
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u32 val;
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int i;
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for (i = 0; i < CLK_MAX_MEMMAPS; i++) {
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if (clocks_node_ptr[i] == node->parent)
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break;
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}
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if (i == CLK_MAX_MEMMAPS) {
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pr_err("clk-provider not found for %s!\n", node->name);
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return -ENOENT;
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}
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reg->index = i;
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if (of_property_read_u32_index(node, "reg", index, &val)) {
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pr_err("%s must have reg[%d]!\n", node->name, index);
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return -EINVAL;
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}
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reg->offset = val;
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reg->ptr = NULL;
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return 0;
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}
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void ti_clk_latch(struct clk_omap_reg *reg, s8 shift)
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{
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u32 latch;
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if (shift < 0)
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return;
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latch = 1 << shift;
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ti_clk_ll_ops->clk_rmw(latch, latch, reg);
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ti_clk_ll_ops->clk_rmw(0, latch, reg);
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ti_clk_ll_ops->clk_readl(reg); /* OCP barrier */
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}
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/**
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* omap2_clk_provider_init - init master clock provider
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* @parent: master node
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* @index: internal index for clk_reg_ops
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* @syscon: syscon regmap pointer for accessing clock registers
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* @mem: iomem pointer for the clock provider memory area, only used if
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* syscon is not provided
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*
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* Initializes a master clock IP block. This basically sets up the
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* mapping from clocks node to the memory map index. All the clocks
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* are then initialized through the common of_clk_init call, and the
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* clocks will access their memory maps based on the node layout.
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* Returns 0 in success.
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*/
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int __init omap2_clk_provider_init(struct device_node *parent, int index,
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struct regmap *syscon, void __iomem *mem)
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{
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struct device_node *clocks;
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struct clk_iomap *io;
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/* get clocks for this parent */
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clocks = of_get_child_by_name(parent, "clocks");
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if (!clocks) {
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pr_err("%s missing 'clocks' child node.\n", parent->name);
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return -EINVAL;
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}
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/* add clocks node info */
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clocks_node_ptr[index] = clocks;
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io = kzalloc(sizeof(*io), GFP_KERNEL);
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if (!io)
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return -ENOMEM;
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io->regmap = syscon;
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io->mem = mem;
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clk_memmaps[index] = io;
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return 0;
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}
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/**
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* omap2_clk_legacy_provider_init - initialize a legacy clock provider
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* @index: index for the clock provider
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* @mem: iomem pointer for the clock provider memory area
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*
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* Initializes a legacy clock provider memory mapping.
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*/
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void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem)
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{
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struct clk_iomap *io;
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io = memblock_virt_alloc(sizeof(*io), 0);
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io->mem = mem;
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clk_memmaps[index] = io;
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}
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/**
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* ti_dt_clk_init_retry_clks - init clocks from the retry list
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*
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* Initializes any clocks that have failed to initialize before,
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* reasons being missing parent node(s) during earlier init. This
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* typically happens only for DPLLs which need to have both of their
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* parent clocks ready during init.
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*/
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void ti_dt_clk_init_retry_clks(void)
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{
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struct clk_init_item *retry;
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struct clk_init_item *tmp;
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int retries = 5;
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while (!list_empty(&retry_list) && retries) {
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list_for_each_entry_safe(retry, tmp, &retry_list, link) {
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pr_debug("retry-init: %s\n", retry->node->name);
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retry->func(retry->user, retry->node);
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list_del(&retry->link);
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kfree(retry);
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}
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retries--;
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}
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}
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static const struct of_device_id simple_clk_match_table[] __initconst = {
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{ .compatible = "fixed-clock" },
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{ .compatible = "fixed-factor-clock" },
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{ }
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};
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/**
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* ti_clk_add_aliases - setup clock aliases
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*
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* Sets up any missing clock aliases. No return value.
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*/
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void __init ti_clk_add_aliases(void)
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{
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struct device_node *np;
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struct clk *clk;
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for_each_matching_node(np, simple_clk_match_table) {
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struct of_phandle_args clkspec;
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clkspec.np = np;
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clk = of_clk_get_from_provider(&clkspec);
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ti_clk_add_alias(NULL, clk, np->name);
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}
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}
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/**
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* ti_clk_setup_features - setup clock features flags
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* @features: features definition to use
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*
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* Initializes the clock driver features flags based on platform
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* provided data. No return value.
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*/
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void __init ti_clk_setup_features(struct ti_clk_features *features)
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{
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memcpy(&ti_clk_features, features, sizeof(*features));
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}
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/**
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* ti_clk_get_features - get clock driver features flags
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*
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* Get TI clock driver features description. Returns a pointer
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* to the current feature setup.
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*/
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const struct ti_clk_features *ti_clk_get_features(void)
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{
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return &ti_clk_features;
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}
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/**
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* omap2_clk_enable_init_clocks - prepare & enable a list of clocks
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* @clk_names: ptr to an array of strings of clock names to enable
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* @num_clocks: number of clock names in @clk_names
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*
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* Prepare and enable a list of clocks, named by @clk_names. No
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* return value. XXX Deprecated; only needed until these clocks are
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* properly claimed and enabled by the drivers or core code that uses
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* them. XXX What code disables & calls clk_put on these clocks?
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*/
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void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
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{
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struct clk *init_clk;
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int i;
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for (i = 0; i < num_clocks; i++) {
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init_clk = clk_get(NULL, clk_names[i]);
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if (WARN(IS_ERR(init_clk), "could not find init clock %s\n",
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clk_names[i]))
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continue;
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clk_prepare_enable(init_clk);
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}
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}
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/**
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* ti_clk_add_alias - add a clock alias for a TI clock
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* @dev: device alias for this clock
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* @clk: clock handle to create alias for
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* @con: connection ID for this clock
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*
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* Creates a clock alias for a TI clock. Allocates the clock lookup entry
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* and assigns the data to it. Returns 0 if successful, negative error
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* value otherwise.
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*/
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int ti_clk_add_alias(struct device *dev, struct clk *clk, const char *con)
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{
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struct clk_lookup *cl;
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if (!clk)
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return 0;
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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cl = kzalloc(sizeof(*cl), GFP_KERNEL);
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if (!cl)
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return -ENOMEM;
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if (dev)
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cl->dev_id = dev_name(dev);
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cl->con_id = con;
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cl->clk = clk;
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clkdev_add(cl);
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return 0;
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}
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/**
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* ti_clk_register - register a TI clock to the common clock framework
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* @dev: device for this clock
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* @hw: hardware clock handle
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* @con: connection ID for this clock
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*
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* Registers a TI clock to the common clock framework, and adds a clock
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* alias for it. Returns a handle to the registered clock if successful,
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* ERR_PTR value in failure.
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*/
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struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw,
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const char *con)
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{
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struct clk *clk;
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int ret;
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clk = clk_register(dev, hw);
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if (IS_ERR(clk))
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return clk;
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ret = ti_clk_add_alias(dev, clk, con);
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if (ret) {
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clk_unregister(clk);
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return ERR_PTR(ret);
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}
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return clk;
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}
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