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![Kunihiko Hayashi](/assets/img/avatar_default.png)
Add clock control for SPI controller on UniPhier SoCs. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
66 lines
2.1 KiB
C
66 lines
2.1 KiB
C
/*
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* Copyright (C) 2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "clk-uniphier.h"
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#define UNIPHIER_PERI_CLK_UART(idx, ch) \
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UNIPHIER_CLK_GATE("uart" #ch, (idx), "uart", 0x24, 19 + (ch))
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#define UNIPHIER_PERI_CLK_I2C_COMMON \
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UNIPHIER_CLK_GATE("i2c-common", -1, "i2c", 0x20, 1)
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#define UNIPHIER_PERI_CLK_I2C(idx, ch) \
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UNIPHIER_CLK_GATE("i2c" #ch, (idx), "i2c-common", 0x24, 5 + (ch))
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#define UNIPHIER_PERI_CLK_FI2C(idx, ch) \
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UNIPHIER_CLK_GATE("i2c" #ch, (idx), "i2c", 0x24, 24 + (ch))
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#define UNIPHIER_PERI_CLK_SCSSI(idx) \
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UNIPHIER_CLK_GATE("scssi", (idx), "spi", 0x20, 17)
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#define UNIPHIER_PERI_CLK_MCSSI(idx) \
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UNIPHIER_CLK_GATE("mcssi", (idx), "spi", 0x24, 14)
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const struct uniphier_clk_data uniphier_ld4_peri_clk_data[] = {
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UNIPHIER_PERI_CLK_UART(0, 0),
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UNIPHIER_PERI_CLK_UART(1, 1),
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UNIPHIER_PERI_CLK_UART(2, 2),
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UNIPHIER_PERI_CLK_UART(3, 3),
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UNIPHIER_PERI_CLK_I2C_COMMON,
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UNIPHIER_PERI_CLK_I2C(4, 0),
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UNIPHIER_PERI_CLK_I2C(5, 1),
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UNIPHIER_PERI_CLK_I2C(6, 2),
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UNIPHIER_PERI_CLK_I2C(7, 3),
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UNIPHIER_PERI_CLK_I2C(8, 4),
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UNIPHIER_PERI_CLK_SCSSI(11),
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{ /* sentinel */ }
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};
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const struct uniphier_clk_data uniphier_pro4_peri_clk_data[] = {
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UNIPHIER_PERI_CLK_UART(0, 0),
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UNIPHIER_PERI_CLK_UART(1, 1),
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UNIPHIER_PERI_CLK_UART(2, 2),
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UNIPHIER_PERI_CLK_UART(3, 3),
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UNIPHIER_PERI_CLK_FI2C(4, 0),
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UNIPHIER_PERI_CLK_FI2C(5, 1),
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UNIPHIER_PERI_CLK_FI2C(6, 2),
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UNIPHIER_PERI_CLK_FI2C(7, 3),
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UNIPHIER_PERI_CLK_FI2C(8, 4),
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UNIPHIER_PERI_CLK_FI2C(9, 5),
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UNIPHIER_PERI_CLK_FI2C(10, 6),
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UNIPHIER_PERI_CLK_SCSSI(11),
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UNIPHIER_PERI_CLK_MCSSI(12),
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{ /* sentinel */ }
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};
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