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![Bjorn Helgaas](/assets/img/avatar_default.png)
Add SPDX GPL-2.0+ to all PCI files that specified the GPL and allowed
either GPL version 2 or any later version.
Remove the boilerplate GPL version 2 or later language, relying on the
assertion in b24413180f
("License cleanup: add SPDX GPL-2.0 license
identifier to files with no license") that the SPDX identifier may be used
instead of the full boilerplate text.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
724 lines
21 KiB
C
724 lines
21 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Compaq Hot Plug Controller Driver
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*
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* Copyright (C) 1995,2001 Compaq Computer Corporation
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* Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
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* Copyright (C) 2001 IBM
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*
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* All rights reserved.
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*
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* Send feedback to <greg@kroah.com>
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*
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*/
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#ifndef _CPQPHP_H
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#define _CPQPHP_H
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#include <linux/interrupt.h>
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#include <asm/io.h> /* for read? and write? functions */
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#include <linux/delay.h> /* for delays */
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#include <linux/mutex.h>
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#include <linux/sched/signal.h> /* for signal_pending() */
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#define MY_NAME "cpqphp"
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#define dbg(fmt, arg...) do { if (cpqhp_debug) printk(KERN_DEBUG "%s: " fmt, MY_NAME, ## arg); } while (0)
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#define err(format, arg...) printk(KERN_ERR "%s: " format, MY_NAME, ## arg)
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#define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME, ## arg)
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#define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME, ## arg)
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struct smbios_system_slot {
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u8 type;
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u8 length;
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u16 handle;
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u8 name_string_num;
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u8 slot_type;
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u8 slot_width;
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u8 slot_current_usage;
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u8 slot_length;
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u16 slot_number;
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u8 properties1;
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u8 properties2;
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} __attribute__ ((packed));
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/* offsets to the smbios generic type based on the above structure layout */
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enum smbios_system_slot_offsets {
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SMBIOS_SLOT_GENERIC_TYPE = offsetof(struct smbios_system_slot, type),
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SMBIOS_SLOT_GENERIC_LENGTH = offsetof(struct smbios_system_slot, length),
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SMBIOS_SLOT_GENERIC_HANDLE = offsetof(struct smbios_system_slot, handle),
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SMBIOS_SLOT_NAME_STRING_NUM = offsetof(struct smbios_system_slot, name_string_num),
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SMBIOS_SLOT_TYPE = offsetof(struct smbios_system_slot, slot_type),
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SMBIOS_SLOT_WIDTH = offsetof(struct smbios_system_slot, slot_width),
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SMBIOS_SLOT_CURRENT_USAGE = offsetof(struct smbios_system_slot, slot_current_usage),
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SMBIOS_SLOT_LENGTH = offsetof(struct smbios_system_slot, slot_length),
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SMBIOS_SLOT_NUMBER = offsetof(struct smbios_system_slot, slot_number),
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SMBIOS_SLOT_PROPERTIES1 = offsetof(struct smbios_system_slot, properties1),
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SMBIOS_SLOT_PROPERTIES2 = offsetof(struct smbios_system_slot, properties2),
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};
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struct smbios_generic {
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u8 type;
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u8 length;
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u16 handle;
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} __attribute__ ((packed));
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/* offsets to the smbios generic type based on the above structure layout */
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enum smbios_generic_offsets {
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SMBIOS_GENERIC_TYPE = offsetof(struct smbios_generic, type),
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SMBIOS_GENERIC_LENGTH = offsetof(struct smbios_generic, length),
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SMBIOS_GENERIC_HANDLE = offsetof(struct smbios_generic, handle),
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};
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struct smbios_entry_point {
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char anchor[4];
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u8 ep_checksum;
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u8 ep_length;
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u8 major_version;
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u8 minor_version;
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u16 max_size_entry;
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u8 ep_rev;
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u8 reserved[5];
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char int_anchor[5];
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u8 int_checksum;
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u16 st_length;
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u32 st_address;
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u16 number_of_entrys;
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u8 bcd_rev;
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} __attribute__ ((packed));
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/* offsets to the smbios entry point based on the above structure layout */
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enum smbios_entry_point_offsets {
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ANCHOR = offsetof(struct smbios_entry_point, anchor[0]),
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EP_CHECKSUM = offsetof(struct smbios_entry_point, ep_checksum),
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EP_LENGTH = offsetof(struct smbios_entry_point, ep_length),
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MAJOR_VERSION = offsetof(struct smbios_entry_point, major_version),
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MINOR_VERSION = offsetof(struct smbios_entry_point, minor_version),
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MAX_SIZE_ENTRY = offsetof(struct smbios_entry_point, max_size_entry),
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EP_REV = offsetof(struct smbios_entry_point, ep_rev),
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INT_ANCHOR = offsetof(struct smbios_entry_point, int_anchor[0]),
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INT_CHECKSUM = offsetof(struct smbios_entry_point, int_checksum),
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ST_LENGTH = offsetof(struct smbios_entry_point, st_length),
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ST_ADDRESS = offsetof(struct smbios_entry_point, st_address),
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NUMBER_OF_ENTRYS = offsetof(struct smbios_entry_point, number_of_entrys),
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BCD_REV = offsetof(struct smbios_entry_point, bcd_rev),
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};
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struct ctrl_reg { /* offset */
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u8 slot_RST; /* 0x00 */
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u8 slot_enable; /* 0x01 */
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u16 misc; /* 0x02 */
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u32 led_control; /* 0x04 */
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u32 int_input_clear; /* 0x08 */
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u32 int_mask; /* 0x0a */
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u8 reserved0; /* 0x10 */
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u8 reserved1; /* 0x11 */
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u8 reserved2; /* 0x12 */
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u8 gen_output_AB; /* 0x13 */
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u32 non_int_input; /* 0x14 */
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u32 reserved3; /* 0x18 */
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u32 reserved4; /* 0x1a */
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u32 reserved5; /* 0x20 */
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u8 reserved6; /* 0x24 */
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u8 reserved7; /* 0x25 */
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u16 reserved8; /* 0x26 */
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u8 slot_mask; /* 0x28 */
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u8 reserved9; /* 0x29 */
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u8 reserved10; /* 0x2a */
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u8 reserved11; /* 0x2b */
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u8 slot_SERR; /* 0x2c */
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u8 slot_power; /* 0x2d */
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u8 reserved12; /* 0x2e */
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u8 reserved13; /* 0x2f */
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u8 next_curr_freq; /* 0x30 */
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u8 reset_freq_mode; /* 0x31 */
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} __attribute__ ((packed));
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/* offsets to the controller registers based on the above structure layout */
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enum ctrl_offsets {
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SLOT_RST = offsetof(struct ctrl_reg, slot_RST),
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SLOT_ENABLE = offsetof(struct ctrl_reg, slot_enable),
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MISC = offsetof(struct ctrl_reg, misc),
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LED_CONTROL = offsetof(struct ctrl_reg, led_control),
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INT_INPUT_CLEAR = offsetof(struct ctrl_reg, int_input_clear),
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INT_MASK = offsetof(struct ctrl_reg, int_mask),
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CTRL_RESERVED0 = offsetof(struct ctrl_reg, reserved0),
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CTRL_RESERVED1 = offsetof(struct ctrl_reg, reserved1),
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CTRL_RESERVED2 = offsetof(struct ctrl_reg, reserved1),
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GEN_OUTPUT_AB = offsetof(struct ctrl_reg, gen_output_AB),
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NON_INT_INPUT = offsetof(struct ctrl_reg, non_int_input),
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CTRL_RESERVED3 = offsetof(struct ctrl_reg, reserved3),
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CTRL_RESERVED4 = offsetof(struct ctrl_reg, reserved4),
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CTRL_RESERVED5 = offsetof(struct ctrl_reg, reserved5),
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CTRL_RESERVED6 = offsetof(struct ctrl_reg, reserved6),
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CTRL_RESERVED7 = offsetof(struct ctrl_reg, reserved7),
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CTRL_RESERVED8 = offsetof(struct ctrl_reg, reserved8),
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SLOT_MASK = offsetof(struct ctrl_reg, slot_mask),
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CTRL_RESERVED9 = offsetof(struct ctrl_reg, reserved9),
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CTRL_RESERVED10 = offsetof(struct ctrl_reg, reserved10),
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CTRL_RESERVED11 = offsetof(struct ctrl_reg, reserved11),
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SLOT_SERR = offsetof(struct ctrl_reg, slot_SERR),
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SLOT_POWER = offsetof(struct ctrl_reg, slot_power),
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NEXT_CURR_FREQ = offsetof(struct ctrl_reg, next_curr_freq),
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RESET_FREQ_MODE = offsetof(struct ctrl_reg, reset_freq_mode),
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};
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struct hrt {
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char sig0;
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char sig1;
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char sig2;
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char sig3;
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u16 unused_IRQ;
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u16 PCIIRQ;
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u8 number_of_entries;
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u8 revision;
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u16 reserved1;
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u32 reserved2;
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} __attribute__ ((packed));
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/* offsets to the hotplug resource table registers based on the above
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* structure layout
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*/
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enum hrt_offsets {
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SIG0 = offsetof(struct hrt, sig0),
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SIG1 = offsetof(struct hrt, sig1),
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SIG2 = offsetof(struct hrt, sig2),
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SIG3 = offsetof(struct hrt, sig3),
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UNUSED_IRQ = offsetof(struct hrt, unused_IRQ),
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PCIIRQ = offsetof(struct hrt, PCIIRQ),
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NUMBER_OF_ENTRIES = offsetof(struct hrt, number_of_entries),
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REVISION = offsetof(struct hrt, revision),
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HRT_RESERVED1 = offsetof(struct hrt, reserved1),
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HRT_RESERVED2 = offsetof(struct hrt, reserved2),
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};
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struct slot_rt {
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u8 dev_func;
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u8 primary_bus;
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u8 secondary_bus;
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u8 max_bus;
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u16 io_base;
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u16 io_length;
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u16 mem_base;
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u16 mem_length;
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u16 pre_mem_base;
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u16 pre_mem_length;
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} __attribute__ ((packed));
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/* offsets to the hotplug slot resource table registers based on the above
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* structure layout
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*/
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enum slot_rt_offsets {
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DEV_FUNC = offsetof(struct slot_rt, dev_func),
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PRIMARY_BUS = offsetof(struct slot_rt, primary_bus),
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SECONDARY_BUS = offsetof(struct slot_rt, secondary_bus),
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MAX_BUS = offsetof(struct slot_rt, max_bus),
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IO_BASE = offsetof(struct slot_rt, io_base),
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IO_LENGTH = offsetof(struct slot_rt, io_length),
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MEM_BASE = offsetof(struct slot_rt, mem_base),
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MEM_LENGTH = offsetof(struct slot_rt, mem_length),
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PRE_MEM_BASE = offsetof(struct slot_rt, pre_mem_base),
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PRE_MEM_LENGTH = offsetof(struct slot_rt, pre_mem_length),
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};
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struct pci_func {
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struct pci_func *next;
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u8 bus;
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u8 device;
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u8 function;
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u8 is_a_board;
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u16 status;
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u8 configured;
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u8 switch_save;
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u8 presence_save;
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u32 base_length[0x06];
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u8 base_type[0x06];
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u16 reserved2;
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u32 config_space[0x20];
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struct pci_resource *mem_head;
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struct pci_resource *p_mem_head;
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struct pci_resource *io_head;
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struct pci_resource *bus_head;
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struct timer_list *p_task_event;
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struct pci_dev *pci_dev;
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};
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struct slot {
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struct slot *next;
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u8 bus;
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u8 device;
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u8 number;
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u8 is_a_board;
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u8 configured;
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u8 state;
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u8 switch_save;
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u8 presence_save;
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u32 capabilities;
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u16 reserved2;
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struct timer_list task_event;
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u8 hp_slot;
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struct controller *ctrl;
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void __iomem *p_sm_slot;
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struct hotplug_slot *hotplug_slot;
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};
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struct pci_resource {
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struct pci_resource *next;
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u32 base;
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u32 length;
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};
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struct event_info {
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u32 event_type;
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u8 hp_slot;
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};
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struct controller {
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struct controller *next;
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u32 ctrl_int_comp;
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struct mutex crit_sect; /* critical section mutex */
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void __iomem *hpc_reg; /* cookie for our pci controller location */
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struct pci_resource *mem_head;
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struct pci_resource *p_mem_head;
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struct pci_resource *io_head;
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struct pci_resource *bus_head;
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struct pci_dev *pci_dev;
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struct pci_bus *pci_bus;
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struct event_info event_queue[10];
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struct slot *slot;
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u8 next_event;
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u8 interrupt;
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u8 cfgspc_irq;
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u8 bus; /* bus number for the pci hotplug controller */
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u8 rev;
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u8 slot_device_offset;
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u8 first_slot;
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u8 add_support;
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u8 push_flag;
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u8 push_button; /* 0 = no pushbutton, 1 = pushbutton present */
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u8 slot_switch_type; /* 0 = no switch, 1 = switch present */
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u8 defeature_PHP; /* 0 = PHP not supported, 1 = PHP supported */
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u8 alternate_base_address; /* 0 = not supported, 1 = supported */
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u8 pci_config_space; /* Index/data access to working registers 0 = not supported, 1 = supported */
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u8 pcix_speed_capability; /* PCI-X */
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u8 pcix_support; /* PCI-X */
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u16 vendor_id;
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struct work_struct int_task_event;
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wait_queue_head_t queue; /* sleep & wake process */
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struct dentry *dentry; /* debugfs dentry */
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};
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struct irq_mapping {
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u8 barber_pole;
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u8 valid_INT;
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u8 interrupt[4];
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};
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struct resource_lists {
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struct pci_resource *mem_head;
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struct pci_resource *p_mem_head;
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struct pci_resource *io_head;
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struct pci_resource *bus_head;
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struct irq_mapping *irqs;
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};
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#define ROM_PHY_ADDR 0x0F0000
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#define ROM_PHY_LEN 0x00ffff
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#define PCI_HPC_ID 0xA0F7
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#define PCI_SUB_HPC_ID 0xA2F7
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#define PCI_SUB_HPC_ID2 0xA2F8
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#define PCI_SUB_HPC_ID3 0xA2F9
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#define PCI_SUB_HPC_ID_INTC 0xA2FA
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#define PCI_SUB_HPC_ID4 0xA2FD
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#define INT_BUTTON_IGNORE 0
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#define INT_PRESENCE_ON 1
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#define INT_PRESENCE_OFF 2
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#define INT_SWITCH_CLOSE 3
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#define INT_SWITCH_OPEN 4
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#define INT_POWER_FAULT 5
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#define INT_POWER_FAULT_CLEAR 6
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#define INT_BUTTON_PRESS 7
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#define INT_BUTTON_RELEASE 8
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#define INT_BUTTON_CANCEL 9
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#define STATIC_STATE 0
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#define BLINKINGON_STATE 1
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#define BLINKINGOFF_STATE 2
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#define POWERON_STATE 3
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#define POWEROFF_STATE 4
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#define PCISLOT_INTERLOCK_CLOSED 0x00000001
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#define PCISLOT_ADAPTER_PRESENT 0x00000002
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#define PCISLOT_POWERED 0x00000004
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#define PCISLOT_66_MHZ_OPERATION 0x00000008
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#define PCISLOT_64_BIT_OPERATION 0x00000010
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#define PCISLOT_REPLACE_SUPPORTED 0x00000020
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#define PCISLOT_ADD_SUPPORTED 0x00000040
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#define PCISLOT_INTERLOCK_SUPPORTED 0x00000080
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#define PCISLOT_66_MHZ_SUPPORTED 0x00000100
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#define PCISLOT_64_BIT_SUPPORTED 0x00000200
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#define PCI_TO_PCI_BRIDGE_CLASS 0x00060400
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#define INTERLOCK_OPEN 0x00000002
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#define ADD_NOT_SUPPORTED 0x00000003
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#define CARD_FUNCTIONING 0x00000005
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#define ADAPTER_NOT_SAME 0x00000006
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#define NO_ADAPTER_PRESENT 0x00000009
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#define NOT_ENOUGH_RESOURCES 0x0000000B
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#define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C
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#define POWER_FAILURE 0x0000000E
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#define REMOVE_NOT_SUPPORTED 0x00000003
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/*
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* error Messages
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*/
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#define msg_initialization_err "Initialization failure, error=%d\n"
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#define msg_HPC_rev_error "Unsupported revision of the PCI hot plug controller found.\n"
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#define msg_HPC_non_compaq_or_intel "The PCI hot plug controller is not supported by this driver.\n"
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#define msg_HPC_not_supported "this system is not supported by this version of cpqphpd. Upgrade to a newer version of cpqphpd\n"
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#define msg_unable_to_save "unable to store PCI hot plug add resource information. This system must be rebooted before adding any PCI devices.\n"
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#define msg_button_on "PCI slot #%d - powering on due to button press.\n"
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#define msg_button_off "PCI slot #%d - powering off due to button press.\n"
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#define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n"
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#define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n"
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/* debugfs functions for the hotplug controller info */
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void cpqhp_initialize_debugfs(void);
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void cpqhp_shutdown_debugfs(void);
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void cpqhp_create_debugfs_files(struct controller *ctrl);
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void cpqhp_remove_debugfs_files(struct controller *ctrl);
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/* controller functions */
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void cpqhp_pushbutton_thread(struct timer_list *t);
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irqreturn_t cpqhp_ctrl_intr(int IRQ, void *data);
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int cpqhp_find_available_resources(struct controller *ctrl,
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void __iomem *rom_start);
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int cpqhp_event_start_thread(void);
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void cpqhp_event_stop_thread(void);
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struct pci_func *cpqhp_slot_create(unsigned char busnumber);
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struct pci_func *cpqhp_slot_find(unsigned char bus, unsigned char device,
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unsigned char index);
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int cpqhp_process_SI(struct controller *ctrl, struct pci_func *func);
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int cpqhp_process_SS(struct controller *ctrl, struct pci_func *func);
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int cpqhp_hardware_test(struct controller *ctrl, int test_num);
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/* resource functions */
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int cpqhp_resource_sort_and_combine(struct pci_resource **head);
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/* pci functions */
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int cpqhp_set_irq(u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
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int cpqhp_get_bus_dev(struct controller *ctrl, u8 *bus_num, u8 *dev_num,
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u8 slot);
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int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug);
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int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func *func);
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int cpqhp_save_used_resources(struct controller *ctrl, struct pci_func *func);
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int cpqhp_configure_board(struct controller *ctrl, struct pci_func *func);
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int cpqhp_save_slot_config(struct controller *ctrl, struct pci_func *new_slot);
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int cpqhp_valid_replace(struct controller *ctrl, struct pci_func *func);
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void cpqhp_destroy_board_resources(struct pci_func *func);
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int cpqhp_return_board_resources(struct pci_func *func,
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struct resource_lists *resources);
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void cpqhp_destroy_resource_list(struct resource_lists *resources);
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int cpqhp_configure_device(struct controller *ctrl, struct pci_func *func);
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int cpqhp_unconfigure_device(struct pci_func *func);
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/* Global variables */
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extern int cpqhp_debug;
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extern int cpqhp_legacy_mode;
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extern struct controller *cpqhp_ctrl_list;
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extern struct pci_func *cpqhp_slot_list[256];
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extern struct irq_routing_table *cpqhp_routing_table;
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/* these can be gotten rid of, but for debugging they are purty */
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extern u8 cpqhp_nic_irq;
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extern u8 cpqhp_disk_irq;
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|
|
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/* inline functions */
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static inline const char *slot_name(struct slot *slot)
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{
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return hotplug_slot_name(slot->hotplug_slot);
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}
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/*
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* return_resource
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*
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* Puts node back in the resource list pointed to by head
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*/
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static inline void return_resource(struct pci_resource **head,
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struct pci_resource *node)
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|
{
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if (!node || !head)
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return;
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node->next = *head;
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*head = node;
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}
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|
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static inline void set_SOGO(struct controller *ctrl)
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{
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u16 misc;
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|
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misc = readw(ctrl->hpc_reg + MISC);
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misc = (misc | 0x0001) & 0xFFFB;
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writew(misc, ctrl->hpc_reg + MISC);
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}
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|
|
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static inline void amber_LED_on(struct controller *ctrl, u8 slot)
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{
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u32 led_control;
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|
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led_control = readl(ctrl->hpc_reg + LED_CONTROL);
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led_control |= (0x01010000L << slot);
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writel(led_control, ctrl->hpc_reg + LED_CONTROL);
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}
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|
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static inline void amber_LED_off(struct controller *ctrl, u8 slot)
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{
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u32 led_control;
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|
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led_control = readl(ctrl->hpc_reg + LED_CONTROL);
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led_control &= ~(0x01010000L << slot);
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writel(led_control, ctrl->hpc_reg + LED_CONTROL);
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}
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|
|
|
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static inline int read_amber_LED(struct controller *ctrl, u8 slot)
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|
{
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u32 led_control;
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|
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led_control = readl(ctrl->hpc_reg + LED_CONTROL);
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led_control &= (0x01010000L << slot);
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|
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return led_control ? 1 : 0;
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}
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|
|
|
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static inline void green_LED_on(struct controller *ctrl, u8 slot)
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|
{
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|
u32 led_control;
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|
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led_control = readl(ctrl->hpc_reg + LED_CONTROL);
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led_control |= 0x0101L << slot;
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writel(led_control, ctrl->hpc_reg + LED_CONTROL);
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}
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|
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static inline void green_LED_off(struct controller *ctrl, u8 slot)
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|
{
|
|
u32 led_control;
|
|
|
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led_control = readl(ctrl->hpc_reg + LED_CONTROL);
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led_control &= ~(0x0101L << slot);
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writel(led_control, ctrl->hpc_reg + LED_CONTROL);
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}
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|
|
|
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static inline void green_LED_blink(struct controller *ctrl, u8 slot)
|
|
{
|
|
u32 led_control;
|
|
|
|
led_control = readl(ctrl->hpc_reg + LED_CONTROL);
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led_control &= ~(0x0101L << slot);
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led_control |= (0x0001L << slot);
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writel(led_control, ctrl->hpc_reg + LED_CONTROL);
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}
|
|
|
|
|
|
static inline void slot_disable(struct controller *ctrl, u8 slot)
|
|
{
|
|
u8 slot_enable;
|
|
|
|
slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
|
|
slot_enable &= ~(0x01 << slot);
|
|
writeb(slot_enable, ctrl->hpc_reg + SLOT_ENABLE);
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|
}
|
|
|
|
|
|
static inline void slot_enable(struct controller *ctrl, u8 slot)
|
|
{
|
|
u8 slot_enable;
|
|
|
|
slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
|
|
slot_enable |= (0x01 << slot);
|
|
writeb(slot_enable, ctrl->hpc_reg + SLOT_ENABLE);
|
|
}
|
|
|
|
|
|
static inline u8 is_slot_enabled(struct controller *ctrl, u8 slot)
|
|
{
|
|
u8 slot_enable;
|
|
|
|
slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
|
|
slot_enable &= (0x01 << slot);
|
|
return slot_enable ? 1 : 0;
|
|
}
|
|
|
|
|
|
static inline u8 read_slot_enable(struct controller *ctrl)
|
|
{
|
|
return readb(ctrl->hpc_reg + SLOT_ENABLE);
|
|
}
|
|
|
|
|
|
/**
|
|
* get_controller_speed - find the current frequency/mode of controller.
|
|
*
|
|
* @ctrl: controller to get frequency/mode for.
|
|
*
|
|
* Returns controller speed.
|
|
*/
|
|
static inline u8 get_controller_speed(struct controller *ctrl)
|
|
{
|
|
u8 curr_freq;
|
|
u16 misc;
|
|
|
|
if (ctrl->pcix_support) {
|
|
curr_freq = readb(ctrl->hpc_reg + NEXT_CURR_FREQ);
|
|
if ((curr_freq & 0xB0) == 0xB0)
|
|
return PCI_SPEED_133MHz_PCIX;
|
|
if ((curr_freq & 0xA0) == 0xA0)
|
|
return PCI_SPEED_100MHz_PCIX;
|
|
if ((curr_freq & 0x90) == 0x90)
|
|
return PCI_SPEED_66MHz_PCIX;
|
|
if (curr_freq & 0x10)
|
|
return PCI_SPEED_66MHz;
|
|
|
|
return PCI_SPEED_33MHz;
|
|
}
|
|
|
|
misc = readw(ctrl->hpc_reg + MISC);
|
|
return (misc & 0x0800) ? PCI_SPEED_66MHz : PCI_SPEED_33MHz;
|
|
}
|
|
|
|
|
|
/**
|
|
* get_adapter_speed - find the max supported frequency/mode of adapter.
|
|
*
|
|
* @ctrl: hotplug controller.
|
|
* @hp_slot: hotplug slot where adapter is installed.
|
|
*
|
|
* Returns adapter speed.
|
|
*/
|
|
static inline u8 get_adapter_speed(struct controller *ctrl, u8 hp_slot)
|
|
{
|
|
u32 temp_dword = readl(ctrl->hpc_reg + NON_INT_INPUT);
|
|
dbg("slot: %d, PCIXCAP: %8x\n", hp_slot, temp_dword);
|
|
if (ctrl->pcix_support) {
|
|
if (temp_dword & (0x10000 << hp_slot))
|
|
return PCI_SPEED_133MHz_PCIX;
|
|
if (temp_dword & (0x100 << hp_slot))
|
|
return PCI_SPEED_66MHz_PCIX;
|
|
}
|
|
|
|
if (temp_dword & (0x01 << hp_slot))
|
|
return PCI_SPEED_66MHz;
|
|
|
|
return PCI_SPEED_33MHz;
|
|
}
|
|
|
|
static inline void enable_slot_power(struct controller *ctrl, u8 slot)
|
|
{
|
|
u8 slot_power;
|
|
|
|
slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
|
|
slot_power |= (0x01 << slot);
|
|
writeb(slot_power, ctrl->hpc_reg + SLOT_POWER);
|
|
}
|
|
|
|
static inline void disable_slot_power(struct controller *ctrl, u8 slot)
|
|
{
|
|
u8 slot_power;
|
|
|
|
slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
|
|
slot_power &= ~(0x01 << slot);
|
|
writeb(slot_power, ctrl->hpc_reg + SLOT_POWER);
|
|
}
|
|
|
|
|
|
static inline int cpq_get_attention_status(struct controller *ctrl, struct slot *slot)
|
|
{
|
|
u8 hp_slot;
|
|
|
|
hp_slot = slot->device - ctrl->slot_device_offset;
|
|
|
|
return read_amber_LED(ctrl, hp_slot);
|
|
}
|
|
|
|
|
|
static inline int get_slot_enabled(struct controller *ctrl, struct slot *slot)
|
|
{
|
|
u8 hp_slot;
|
|
|
|
hp_slot = slot->device - ctrl->slot_device_offset;
|
|
|
|
return is_slot_enabled(ctrl, hp_slot);
|
|
}
|
|
|
|
|
|
static inline int cpq_get_latch_status(struct controller *ctrl,
|
|
struct slot *slot)
|
|
{
|
|
u32 status;
|
|
u8 hp_slot;
|
|
|
|
hp_slot = slot->device - ctrl->slot_device_offset;
|
|
dbg("%s: slot->device = %d, ctrl->slot_device_offset = %d\n",
|
|
__func__, slot->device, ctrl->slot_device_offset);
|
|
|
|
status = (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot));
|
|
|
|
return (status == 0) ? 1 : 0;
|
|
}
|
|
|
|
|
|
static inline int get_presence_status(struct controller *ctrl,
|
|
struct slot *slot)
|
|
{
|
|
int presence_save = 0;
|
|
u8 hp_slot;
|
|
u32 tempdword;
|
|
|
|
hp_slot = slot->device - ctrl->slot_device_offset;
|
|
|
|
tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
|
|
presence_save = (int) ((((~tempdword) >> 23) | ((~tempdword) >> 15))
|
|
>> hp_slot) & 0x02;
|
|
|
|
return presence_save;
|
|
}
|
|
|
|
static inline int wait_for_ctrl_irq(struct controller *ctrl)
|
|
{
|
|
DECLARE_WAITQUEUE(wait, current);
|
|
int retval = 0;
|
|
|
|
dbg("%s - start\n", __func__);
|
|
add_wait_queue(&ctrl->queue, &wait);
|
|
/* Sleep for up to 1 second to wait for the LED to change. */
|
|
msleep_interruptible(1000);
|
|
remove_wait_queue(&ctrl->queue, &wait);
|
|
if (signal_pending(current))
|
|
retval = -EINTR;
|
|
|
|
dbg("%s - end\n", __func__);
|
|
return retval;
|
|
}
|
|
|
|
#include <asm/pci_x86.h>
|
|
static inline int cpqhp_routing_table_length(void)
|
|
{
|
|
BUG_ON(cpqhp_routing_table == NULL);
|
|
return ((cpqhp_routing_table->size - sizeof(struct irq_routing_table)) /
|
|
sizeof(struct irq_info));
|
|
}
|
|
|
|
#endif
|