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2ce7f2f425
This PHY is still mostly undocumented -- the only documented registers exist on R-Car V3H (R8A77980) SoC where this PHY stays in a powered-down state after a reset and thus we must power it up for PCIe to work... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
4 lines
219 B
Makefile
4 lines
219 B
Makefile
obj-$(CONFIG_PHY_RCAR_GEN2) += phy-rcar-gen2.o
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obj-$(CONFIG_PHY_RCAR_GEN3_PCIE) += phy-rcar-gen3-pcie.o
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obj-$(CONFIG_PHY_RCAR_GEN3_USB2) += phy-rcar-gen3-usb2.o
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obj-$(CONFIG_PHY_RCAR_GEN3_USB3) += phy-rcar-gen3-usb3.o
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