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![Sergei Shtylyov](/assets/img/avatar_default.png)
This PHY is still mostly undocumented -- the only documented registers exist on R-Car V3H (R8A77980) SoC where this PHY stays in a powered-down state after a reset and thus we must power it up for PCIe to work... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
151 lines
3.3 KiB
C
151 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Renesas R-Car Gen3 PCIe PHY driver
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*
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* Copyright (C) 2018 Cogent Embedded, Inc.
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/phy/phy.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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#define PHY_CTRL 0x4000 /* R8A77980 only */
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/* PHY control register (PHY_CTRL) */
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#define PHY_CTRL_PHY_PWDN BIT(2)
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struct rcar_gen3_phy {
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struct phy *phy;
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spinlock_t lock;
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void __iomem *base;
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};
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static void rcar_gen3_phy_pcie_modify_reg(struct phy *p, unsigned int reg,
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u32 clear, u32 set)
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{
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struct rcar_gen3_phy *phy = phy_get_drvdata(p);
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void __iomem *base = phy->base;
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unsigned long flags;
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u32 value;
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spin_lock_irqsave(&phy->lock, flags);
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value = readl(base + reg);
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value &= ~clear;
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value |= set;
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writel(value, base + reg);
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spin_unlock_irqrestore(&phy->lock, flags);
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}
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static int r8a77980_phy_pcie_power_on(struct phy *p)
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{
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/* Power on the PCIe PHY */
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rcar_gen3_phy_pcie_modify_reg(p, PHY_CTRL, PHY_CTRL_PHY_PWDN, 0);
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return 0;
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}
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static int r8a77980_phy_pcie_power_off(struct phy *p)
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{
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/* Power off the PCIe PHY */
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rcar_gen3_phy_pcie_modify_reg(p, PHY_CTRL, 0, PHY_CTRL_PHY_PWDN);
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return 0;
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}
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static const struct phy_ops r8a77980_phy_pcie_ops = {
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.power_on = r8a77980_phy_pcie_power_on,
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.power_off = r8a77980_phy_pcie_power_off,
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.owner = THIS_MODULE,
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};
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static const struct of_device_id rcar_gen3_phy_pcie_match_table[] = {
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{ .compatible = "renesas,r8a77980-pcie-phy" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, rcar_gen3_phy_pcie_match_table);
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static int rcar_gen3_phy_pcie_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct phy_provider *provider;
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struct rcar_gen3_phy *phy;
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struct resource *res;
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void __iomem *base;
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int error;
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if (!dev->of_node) {
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dev_err(dev,
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"This driver must only be instantiated from the device tree\n");
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return -EINVAL;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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base = devm_ioremap_resource(dev, res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
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if (!phy)
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return -ENOMEM;
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spin_lock_init(&phy->lock);
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phy->base = base;
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/*
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* devm_phy_create() will call pm_runtime_enable(&phy->dev);
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* And then, phy-core will manage runtime PM for this device.
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*/
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pm_runtime_enable(dev);
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phy->phy = devm_phy_create(dev, NULL, &r8a77980_phy_pcie_ops);
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if (IS_ERR(phy->phy)) {
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dev_err(dev, "Failed to create PCIe PHY\n");
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error = PTR_ERR(phy->phy);
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goto error;
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}
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phy_set_drvdata(phy->phy, phy);
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provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
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if (IS_ERR(provider)) {
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dev_err(dev, "Failed to register PHY provider\n");
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error = PTR_ERR(provider);
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goto error;
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}
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return 0;
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error:
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pm_runtime_disable(dev);
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return error;
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}
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static int rcar_gen3_phy_pcie_remove(struct platform_device *pdev)
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{
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pm_runtime_disable(&pdev->dev);
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return 0;
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};
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static struct platform_driver rcar_gen3_phy_driver = {
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.driver = {
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.name = "phy_rcar_gen3_pcie",
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.of_match_table = rcar_gen3_phy_pcie_match_table,
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},
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.probe = rcar_gen3_phy_pcie_probe,
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.remove = rcar_gen3_phy_pcie_remove,
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};
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module_platform_driver(rcar_gen3_phy_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Renesas R-Car Gen3 PCIe PHY");
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MODULE_AUTHOR("Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>");
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