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![Michal Simek](/assets/img/avatar_default.png)
There is no reason to initialize uartclk to BASE_BAUD * 16 for DT based systems. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Matt Redfearn <matt.redfearn@mips.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
304 lines
7.4 KiB
C
304 lines
7.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2014 Linaro Ltd.
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* Author: Rob Herring <robh@kernel.org>
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*
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* Based on 8250 earlycon:
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* (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
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* Bjorn Helgaas <bjorn.helgaas@hp.com>
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/console.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/serial_core.h>
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#include <linux/sizes.h>
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#include <linux/of.h>
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#include <linux/of_fdt.h>
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#include <linux/acpi.h>
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#ifdef CONFIG_FIX_EARLYCON_MEM
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#include <asm/fixmap.h>
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#endif
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#include <asm/serial.h>
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static struct console early_con = {
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.name = "uart", /* fixed up at earlycon registration */
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.flags = CON_PRINTBUFFER | CON_BOOT,
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.index = 0,
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};
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static struct earlycon_device early_console_dev = {
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.con = &early_con,
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};
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static void __iomem * __init earlycon_map(resource_size_t paddr, size_t size)
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{
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void __iomem *base;
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#ifdef CONFIG_FIX_EARLYCON_MEM
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set_fixmap_io(FIX_EARLYCON_MEM_BASE, paddr & PAGE_MASK);
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base = (void __iomem *)__fix_to_virt(FIX_EARLYCON_MEM_BASE);
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base += paddr & ~PAGE_MASK;
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#else
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base = ioremap(paddr, size);
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#endif
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if (!base)
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pr_err("%s: Couldn't map %pa\n", __func__, &paddr);
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return base;
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}
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static void __init earlycon_init(struct earlycon_device *device,
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const char *name)
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{
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struct console *earlycon = device->con;
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struct uart_port *port = &device->port;
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const char *s;
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size_t len;
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/* scan backwards from end of string for first non-numeral */
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for (s = name + strlen(name);
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s > name && s[-1] >= '0' && s[-1] <= '9';
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s--)
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;
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if (*s)
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earlycon->index = simple_strtoul(s, NULL, 10);
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len = s - name;
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strlcpy(earlycon->name, name, min(len + 1, sizeof(earlycon->name)));
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earlycon->data = &early_console_dev;
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if (port->iotype == UPIO_MEM || port->iotype == UPIO_MEM16 ||
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port->iotype == UPIO_MEM32 || port->iotype == UPIO_MEM32BE)
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pr_info("%s%d at MMIO%s %pa (options '%s')\n",
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earlycon->name, earlycon->index,
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(port->iotype == UPIO_MEM) ? "" :
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(port->iotype == UPIO_MEM16) ? "16" :
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(port->iotype == UPIO_MEM32) ? "32" : "32be",
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&port->mapbase, device->options);
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else
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pr_info("%s%d at I/O port 0x%lx (options '%s')\n",
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earlycon->name, earlycon->index,
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port->iobase, device->options);
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}
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static int __init parse_options(struct earlycon_device *device, char *options)
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{
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struct uart_port *port = &device->port;
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int length;
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resource_size_t addr;
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if (uart_parse_earlycon(options, &port->iotype, &addr, &options))
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return -EINVAL;
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switch (port->iotype) {
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case UPIO_MEM:
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port->mapbase = addr;
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break;
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case UPIO_MEM16:
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port->regshift = 1;
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port->mapbase = addr;
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break;
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case UPIO_MEM32:
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case UPIO_MEM32BE:
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port->regshift = 2;
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port->mapbase = addr;
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break;
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case UPIO_PORT:
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port->iobase = addr;
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break;
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default:
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return -EINVAL;
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}
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if (options) {
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device->baud = simple_strtoul(options, NULL, 0);
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length = min(strcspn(options, " ") + 1,
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(size_t)(sizeof(device->options)));
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strlcpy(device->options, options, length);
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}
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return 0;
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}
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static int __init register_earlycon(char *buf, const struct earlycon_id *match)
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{
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int err;
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struct uart_port *port = &early_console_dev.port;
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/* On parsing error, pass the options buf to the setup function */
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if (buf && !parse_options(&early_console_dev, buf))
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buf = NULL;
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spin_lock_init(&port->lock);
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port->uartclk = BASE_BAUD * 16;
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if (port->mapbase)
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port->membase = earlycon_map(port->mapbase, 64);
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earlycon_init(&early_console_dev, match->name);
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err = match->setup(&early_console_dev, buf);
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if (err < 0)
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return err;
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if (!early_console_dev.con->write)
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return -ENODEV;
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register_console(early_console_dev.con);
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return 0;
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}
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/**
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* setup_earlycon - match and register earlycon console
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* @buf: earlycon param string
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*
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* Registers the earlycon console matching the earlycon specified
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* in the param string @buf. Acceptable param strings are of the form
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* <name>,io|mmio|mmio32|mmio32be,<addr>,<options>
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* <name>,0x<addr>,<options>
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* <name>,<options>
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* <name>
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*
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* Only for the third form does the earlycon setup() method receive the
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* <options> string in the 'options' parameter; all other forms set
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* the parameter to NULL.
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*
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* Returns 0 if an attempt to register the earlycon was made,
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* otherwise negative error code
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*/
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int __init setup_earlycon(char *buf)
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{
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const struct earlycon_id **p_match;
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if (!buf || !buf[0])
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return -EINVAL;
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if (early_con.flags & CON_ENABLED)
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return -EALREADY;
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for (p_match = __earlycon_table; p_match < __earlycon_table_end;
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p_match++) {
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const struct earlycon_id *match = *p_match;
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size_t len = strlen(match->name);
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if (strncmp(buf, match->name, len))
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continue;
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if (buf[len]) {
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if (buf[len] != ',')
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continue;
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buf += len + 1;
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} else
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buf = NULL;
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return register_earlycon(buf, match);
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}
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return -ENOENT;
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}
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/*
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* This defers the initialization of the early console until after ACPI has
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* been initialized.
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*/
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bool earlycon_acpi_spcr_enable __initdata;
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/* early_param wrapper for setup_earlycon() */
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static int __init param_setup_earlycon(char *buf)
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{
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int err;
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/* Just 'earlycon' is a valid param for devicetree and ACPI SPCR. */
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if (!buf || !buf[0]) {
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if (IS_ENABLED(CONFIG_ACPI_SPCR_TABLE)) {
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earlycon_acpi_spcr_enable = true;
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return 0;
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} else if (!buf) {
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return early_init_dt_scan_chosen_stdout();
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}
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}
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err = setup_earlycon(buf);
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if (err == -ENOENT || err == -EALREADY)
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return 0;
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return err;
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}
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early_param("earlycon", param_setup_earlycon);
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#ifdef CONFIG_OF_EARLY_FLATTREE
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int __init of_setup_earlycon(const struct earlycon_id *match,
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unsigned long node,
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const char *options)
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{
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int err;
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struct uart_port *port = &early_console_dev.port;
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const __be32 *val;
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bool big_endian;
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u64 addr;
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spin_lock_init(&port->lock);
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port->iotype = UPIO_MEM;
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addr = of_flat_dt_translate_address(node);
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if (addr == OF_BAD_ADDR) {
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pr_warn("[%s] bad address\n", match->name);
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return -ENXIO;
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}
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port->mapbase = addr;
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val = of_get_flat_dt_prop(node, "reg-offset", NULL);
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if (val)
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port->mapbase += be32_to_cpu(*val);
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port->membase = earlycon_map(port->mapbase, SZ_4K);
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val = of_get_flat_dt_prop(node, "reg-shift", NULL);
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if (val)
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port->regshift = be32_to_cpu(*val);
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big_endian = of_get_flat_dt_prop(node, "big-endian", NULL) != NULL ||
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(IS_ENABLED(CONFIG_CPU_BIG_ENDIAN) &&
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of_get_flat_dt_prop(node, "native-endian", NULL) != NULL);
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val = of_get_flat_dt_prop(node, "reg-io-width", NULL);
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if (val) {
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switch (be32_to_cpu(*val)) {
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case 1:
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port->iotype = UPIO_MEM;
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break;
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case 2:
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port->iotype = UPIO_MEM16;
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break;
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case 4:
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port->iotype = (big_endian) ? UPIO_MEM32BE : UPIO_MEM32;
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break;
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default:
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pr_warn("[%s] unsupported reg-io-width\n", match->name);
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return -EINVAL;
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}
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}
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val = of_get_flat_dt_prop(node, "current-speed", NULL);
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if (val)
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early_console_dev.baud = be32_to_cpu(*val);
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val = of_get_flat_dt_prop(node, "clock-frequency", NULL);
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if (val)
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port->uartclk = be32_to_cpu(*val);
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if (options) {
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early_console_dev.baud = simple_strtoul(options, NULL, 0);
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strlcpy(early_console_dev.options, options,
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sizeof(early_console_dev.options));
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}
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earlycon_init(&early_console_dev, match->name);
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err = match->setup(&early_console_dev, options);
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if (err < 0)
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return err;
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if (!early_console_dev.con->write)
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return -ENODEV;
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register_console(early_console_dev.con);
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return 0;
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}
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#endif /* CONFIG_OF_EARLY_FLATTREE */
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